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  1. I.nfraR.ed

    [Sammelthread] AMD K7 - Sockel A (462)

    I actually enjoy clocking the locked ones more, it's more challenging. Otherwise it's just like the XP-M counterpart. I know cpuz record is impossible with a locked 2500+, although I can always use a VIA board for that purpose. Other records are within reach, already did 1M and pifast.
  2. I.nfraR.ed

    [Sammelthread] AMD K7 - Sockel A (462)

    Interesting. So it seems to be a 2500+ with 2 L3 bridges cut to set the starting multiplier at 12.5x. But these are extremely clean cuts and almost invisible without those closeup pictures. If you haven't posted the last 2 photos I would have missed it. Question is if this is extremely good fake...
  3. I.nfraR.ed

    [Sammelthread] AMD K7 - Sockel A (462)

    I don't have anything close to this. Earliest AQYHA I have is 0410. Have bunch of AQYFA around 0340 week, some newer. Oldest Barton I have is Athlon XP 3200+ AXDA3200DKV4E AQXDA 0316RPAW Barton
  4. I.nfraR.ed

    [Sammelthread] AMD K7 - Sockel A (462)

    Yes, haven't seen any relation to the PCB color. I have similarly clocking XP-M 2500+ from the same batch (same production week) and they are different colors. In fact, the green seems to be slightly better than the brown one, which currently holds the platform records. I have some decent CPUs...
  5. I.nfraR.ed

    [Sammelthread] AMD K7 - Sockel A (462)

    Thanks! Yes, after app load the frequency seems more accurate, it's probably due to the higher load while loading. I tried to make the detection as light as possible without long cycles. Doesn't need to be 100% accurate in my opinion. As for Sideband addressing, it works on Abit, but I will...
  6. I.nfraR.ed

    [Sammelthread] AMD K7 - Sockel A (462)

    I've probably solved the issue. Can you test if the CPU frequency, multiplier and real FSB are close enough to what CPUZ shows? It's shown on app open and when Apply is clicked from Chipset tab. Setting new FSB works, but doesn't show the real FSB yet. There's a lot in it, I'm measuring current...
  7. I.nfraR.ed

    [Sammelthread] AMD K7 - Sockel A (462)

    Register A0 displays some sort of a counter and when you write a new PLL value it has to be reset to 0. According to the code in the linux kernel you have to write the PLL 64 times to the A4 and each time this A0 register increases value. A0 is named "PLL Address", A4 is "PLL Register", A8 is...
  8. I.nfraR.ed

    [Sammelthread] AMD K7 - Sockel A (462)

    Yes, that's not it. I think it is based on the current PLL (1MHz step) and the actual FSB is then calculated from that PLL value, current FID and CPU frequency. Reading and settings FSB works, just need to add that calculation, so it can predict better what would be the actual FSB. For example...
  9. I.nfraR.ed

    [Sammelthread] AMD K7 - Sockel A (462)

    Yes, that's correct. I just don't understand how clockgen calculates the next step when you click the right arrow and then how it gets the value after the floating point. Sometimes it is +0.83, sometimes +0.84, +0.85, + 0.86, +0.29...
  10. I.nfraR.ed

    [Sammelthread] AMD K7 - Sockel A (462)

    Never tried the LP B with digitalbath's modded bios, I don't really use that board often.
  11. I.nfraR.ed

    [Sammelthread] AMD K7 - Sockel A (462)

    The thing is this driver works with integer only, calculating fsb from pll multiplier and divider. The PLL register is b0/d0/f0 reg A4 (dword). When 200FSB is set, clockgen shows 200.49. Value of the register is 005BF81F, where 5B varies, so I assume this somehow represents the value after the...
  12. I.nfraR.ed

    [Sammelthread] AMD K7 - Sockel A (462)

    I'm working on the FSB control in the tweaker and it is somewhat working, but still can't get the real FSB that is displayed in the nf2 clockgen. I've used/ported the driver from linux kernel, but it doesn't seem to work 100% correctly...
  13. I.nfraR.ed

    [Sammelthread] AMD K7 - Sockel A (462)

    Another AN7 (untested) I have laying around Northbridge 0344A1 Southbridge 0348A4 Serial: RD460406002007509 Version 1.0 PCB version: 0.32
  14. I.nfraR.ed

    [Sammelthread] AMD K7 - Sockel A (462)

    This, in my experience, is especially true for older CPUs (such as Thunderbirds) that can't do really high FSB. One such result is this one with a Thunderbird 1200 (stock FSB 133) https://hwbot.org/submission/2377667_i.nfrar.ed_superpi___1m_athlon_1200_(thunderbird_fsb_133)_53sec_167ms In...
  15. I.nfraR.ed

    [Sammelthread] AMD K7 - Sockel A (462)

    You have to change it for all slots. I made different tests with different registers sequence and don't remember which had biggest success anymore. Latest ZenTimings release seems to be stable and no bugs reported yet, so I want to implement FSB control and then maybe the long awaited profiles...
  16. I.nfraR.ed

    [Sammelthread] AMD K7 - Sockel A (462)

    If you remember, I did some tests with CAS and some combinations worked from Windows, while others freeze the system. On socket A there's a "half-latency" bit that needs to be set as well, probably other registers too. Basically, booting at CAS 2.5 was the only case where changing CAS in Windows...
  17. I.nfraR.ed

    [Sammelthread] AMD K7 - Sockel A (462)

    More VDD or VDIMM? 3.3V rail? Honestly, I don't know what helps :( How high can you POST? I know the CPU matters, but never tested e.g. 10 unlocked barton XP-M on one board to see if there's a difference.
  18. I.nfraR.ed

    [Sammelthread] AMD K7 - Sockel A (462)

    You also need to change to "Standard PC" HAL in Windows, together with APIC off from bios.
  19. I.nfraR.ed

    [Sammelthread] AMD K7 - Sockel A (462)

    I've uploaded beta2 with fixed Drive Strength and Slew Rate: nForce2XT_1.0_beta2_20201127.zip Should set them correctly now. Profiles are not ready yet. As for the Geode, I've tested 2 or 3 NX 1500 and quality varies a lot. All of the 3 were the same batch, just different serial numbers. IIRC...
  20. I.nfraR.ed

    [Sammelthread] AMD K7 - Sockel A (462)

    The tool reads it from 0, 0, 1, 0x84, 29, 1, which means b0d0f1x84 bit 29, which is in the x87 register, so it seems to be just a documentation issue. But I will double check that, which means it would be the DFI board then...
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