i7-8700K OC instabil

[nic22258]

Ich bin zwar nicht der Profi im Bereich OC, aber trotzdem sollten folgende Einstellungen meiner Meinung nach eigentlich passen. Das tun sie aber leider nicht, ein Prime95 Stresstest (1344K) läuft ohne Probleme, jedoch resultiert jeder Cinebench Test und jede einigermaßen anspruchsvolle Software in einem "CLOCK_WATCHDOG_TIMEOUT"-Bluescreen. Auch durch Anpassen der Spannung wird das Problem nicht behoben. Falls relevant: Ich habe als Arbeitsspeicher den HX424C15FBK4/16 von Kingston/HyperX.
Hier sind meine Mainboard Einstellungen (Asus Prime Z370-A):

Spoiler

Ai Overclock Tuner [Manual]
BCLK Frequency [Auto]
ASUS MultiCore Enhancement [Disabled]
SVID Behavior [Auto]
AVX Instruction Core Ratio Negative Offset [3]
CPU Core Ratio [Sync All Cores]
1-Core Ratio Limit [50]
2-Core Ratio Limit [50]
3-Core Ratio Limit [50]
4-Core Ratio Limit [50]
5-Core Ratio Limit [50]
6-Core Ratio Limit [50]
BCLK Frequency : DRAM Frequency Ratio [Auto]
DRAM Odd Ratio Mode [Enabled]
DRAM Frequency [DDR4-2500MHz]
TPU [Keep Current Settings]
Power-saving & Performance Mode [Performance mode]
CPU SVID Support [Disabled]
CPU Core/Cache Current Limit Max. [255.50]
Ring Down Bin [Auto]
Min. CPU Cache Ratio [45]
Max CPU Cache Ratio [45]
Extreme Over-voltage [Disabled]
BCLK Aware Adaptive Voltage [Auto]
CPU Core/Cache Voltage [Manual Mode]
- CPU Core Voltage Override [1.350]
DRAM Voltage [Auto]
CPU VCCIO Voltage [1.20000]
CPU System Agent Voltage [1.20000]
PCH Core Voltage [Auto]
CPU Standby Voltage [Auto]
DRAM CTRL REF Voltage on CHA [Auto]
DRAM CTRL REF Voltage on CHB [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL0 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL1 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL2 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL3 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL4 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL5 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL6 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL7 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL0 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL1 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL2 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL3 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL4 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL5 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL6 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL7 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL0 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL1 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL2 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL3 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL4 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL5 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL6 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL7 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL0 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL1 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL2 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL3 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL4 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL5 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL6 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL7 [Auto]
DRAM CAS# Latency [Auto]
DRAM RAS# to CAS# Delay [Auto]
DRAM RAS# ACT Time [Auto]
DRAM Command Rate [Auto]
DRAM RAS# to RAS# Delay L [Auto]
DRAM RAS# to RAS# Delay S [Auto]
DRAM REF Cycle Time [Auto]
DRAM Refresh Interval [Auto]
DRAM WRITE Recovery Time [Auto]
DRAM READ to PRE Time [Auto]
DRAM FOUR ACT WIN Time [Auto]
DRAM WRITE to READ Delay [Auto]
DRAM WRITE to READ Delay L [Auto]
DRAM WRITE to READ Delay S [Auto]
DRAM CKE Minimum Pulse Width [Auto]
DRAM Write Latency [Auto]
tRDRD_sg [Auto]
tRDRD_dg [Auto]
tRDWR_sg [Auto]
tRDWR_dg [Auto]
tWRWR_sg [Auto]
tWRWR_dg [Auto]
tWRRD_sg [Auto]
tWRRD_dg [Auto]
tRDRD_dr [Auto]
tRDRD_dd [Auto]
tRDWR_dr [Auto]
tRDWR_dd [Auto]
tWRWR_dr [Auto]
tWRWR_dd [Auto]
tWRRD_dr [Auto]
tWRRD_dd [Auto]
TWRPRE [Auto]
TRDPRE [Auto]
tREFIX9 [Auto]
OREF_RI [Auto]
MRC Fast Boot [Auto]
DRAM CLK Period [Auto]
Memory Scrambler [Enabled]
Channel A DIMM Control [Enable both DIMMs]
Channel B DIMM Control [Enable both DIMMs]
MCH Full Check [Auto]
Training Profile [Auto]
DLLBwEn [Auto]
DRAM SPD Write [Disabled]
DRAM RTL INIT value [Auto]
DRAM RTL (CHA DIMM0 Rank0) [Auto]
DRAM RTL (CHA DIMM0 Rank1) [Auto]
DRAM RTL (CHA DIMM1 Rank0) [Auto]
DRAM RTL (CHA DIMM1 Rank1) [Auto]
DRAM RTL (CHB DIMM0 Rank0) [Auto]
DRAM RTL (CHB DIMM0 Rank1) [Auto]
DRAM RTL (CHB DIMM1 Rank0) [Auto]
DRAM RTL (CHB DIMM1 Rank1) [Auto]
DRAM IOL (CHA DIMM0 Rank0) [Auto]
DRAM IOL (CHA DIMM0 Rank1) [Auto]
DRAM IOL (CHA DIMM1 Rank0) [Auto]
DRAM IOL (CHA DIMM1 Rank1) [Auto]
DRAM IOL (CHB DIMM0 Rank0) [Auto]
DRAM IOL (CHB DIMM0 Rank1) [Auto]
DRAM IOL (CHB DIMM1 Rank0) [Auto]
DRAM IOL (CHB DIMM1 Rank1) [Auto]
CHA IO_Latency_offset [Auto]
CHB IO_Latency_offset [Auto]
CHA RFR delay [Auto]
CHB RFR delay [Auto]
ODT RTT WR (CHA) [Auto]
ODT RTT PARK (CHA) [Auto]
ODT RTT NOM (CHA) [Auto]
ODT RTT WR (CHB) [Auto]
ODT RTT PARK (CHB) [Auto]
ODT RTT NOM (CHB) [Auto]
ODT_READ_DURATION [Auto]
ODT_READ_DELAY [Auto]
ODT_WRITE_DURATION [Auto]
ODT_WRITE_DELAY [Auto]
Data Rising Slope [Auto]
Data Rising Slope Offset [Auto]
Cmd Rising Slope [Auto]
Cmd Rising Slope Offset [Auto]
Ctl Rising Slope [Auto]
Ctl Rising Slope Offset [Auto]
Clk Rising Slope [Auto]
Clk Rising Slope Offset [Auto]
Data Falling Slope [Auto]
Data Falling Slope Offset [Auto]
Cmd Falling Slope [Auto]
Cmd Falling Slope Offset [Auto]
Ctl Falling Slope [Auto]
Ctl Falling Slope Offset [Auto]
Clk Falling Slope [Auto]
Clk Falling Slope Offset [Auto]
CPU Load-line Calibration [Level 6]
CPU Current Capability [Auto]
CPU VRM Switching Frequency [Auto]
VRM Spread Spectrum [Auto]
CPU Power Duty Control [T.Probe]
CPU Power Phase Control [Auto]
CPU VRM Thermal Control [Auto]
Intel(R) SpeedStep(tm) [Disabled]
Turbo Mode [Enabled]
Long Duration Package Power Limit [4095]
Package Power Time Window [127]
Short Duration Package Power Limit [4095]
IA AC Load Line [Auto]
IA DC Load Line [Auto]
PCI Express Native Power Management [Disabled]
PCH DMI ASPM [Disabled]
ASPM [Disabled]
L1 Substates [Disabled]
PCI Express Clock Gating [Enabled]
DMI Link ASPM Control [Disabled]
PEG - ASPM [Disabled]
Hyper-Threading [Enabled]
Active Processor Cores [All]
Intel Virtualization Technology [Disabled]
Hardware Prefetcher [Enabled]
Adjacent Cache Line Prefetch [Enabled]
SW Guard Extensions (SGX) [Software Controlled]
Tcc Offset Time Window [Auto]
Intel(R) SpeedStep(tm) [Disabled]
Turbo Mode [Enabled]
CPU C-states [Disabled]
CFG Lock [Disabled]
Intel(R) Speed Shift Technology [Disabled]
VT-d [Disabled]

MfG
nic22258

 

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