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Yes, it's without RX-DFE, I thought it would be better to build a C36 profile instead. I have bigger headroom for TX and VDD2 due to the higher delta's.
This one got a blue screen later with PFN list error. 😂
So I reduced the RAM VDD a little and RAM VDDQ. Y was able to run 8 minutes again but TM5 errored in 15 minutes with error 15.
I will try now with higher VPP and delta too.
Y is promising, if I can find the good RAM voltages it can run further.
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I did it! After two weeks of fiddling, my memory now runs both sticks of the 7200 kit at 7600. Just two weeks ago, my motherboard couldn't even handle both sticks at the same time.
Now I am already thinking of pushing to 8000, but it seems my memory is limiting that endeavor 😕
@Veii here is where i ended up after a few long hours of testing, got the die sense value down alot - dont think i'll get much better than this without alot more time/effort but wanted to say thanks again for the help appreciate it
@Veii here is where i ended up after a few long hours of testing, got the die sense value down alot - dont think i'll get much better than this without alot more time/effort but wanted to say thanks again for the help appreciate it Anhang anzeigen 965824
Be careful about the lowest curve points.,
700mV is quite low. It may or may not if you change things around become too low.
But it is ok how it is right now. Just need an "ok" from you too for "many task" tests.
That is geekbench, cinebench, actually cine R15 extreme i got recommended is quite evil now (keep your ICCMAX enabled)
And i guess games are dynamic enough load, to figure out curve issues. Instability on clock between 2100-4500 is not easy to track~
What you want at least with y-cruncher stability, is it not hitting PL4
Ring will be an issue, but a powerlimiited Ring at whatever clock, is less of a ... good idea.
Just not needed and pushes VID requests uselessly high.
Yes, it's without RX-DFE, I thought it would be better to build a C36 profile instead. I have bigger headroom for TX and VDD2 due to the higher delta's.
This one got a blue screen later with PFN list error. 😂
So I reduced the RAM VDD a little and RAM VDDQ. Y was able to run 8 minutes again but TM5 errored in 15 minutes with error 15.
I will try now with higher VPP and delta too.
Y is promising, if I can find the good RAM voltages it can run further.
Good good,
I'm happy you try to figure it out
But sadly even if #15 less of an heavy error , it still is one that can come due to anything
I'm not sure you actually make progress when trying own things and going around the issue.
Of course slower timings may give fractional% more stability , but thats not the point
System very much is usable with errors these days.
Just right now with you doing own changes - i again have no idea about the actual problem that is "currently" happening.
Don't go around the issue.
Please try suggestions and continue from there.
Your report reads like you made the issue worse, but good to know how not to do it.
Still a learning experience. 🤭
Looking forward for new updates.
Needs testet VPP_MEM , needs testet higher delta in mem that may expose new errors
And then we have to see what the actual current problem is
The new current problem is just bad, please revert.
Pass 0-1%,
A pass 1 means only that a preset of test cycles are passing , for the little isolated memory section.
// Its like just one cycle of TM5, except this tests isolated.
You want a 100% coverage - which may take 6-10 hours, given capacity is higher an higher.
It is a weak load, soo its not a bad idea to let it overnight run. But 1 test is just like - well you see it , its 1/100% pass
Good good,
I'm happy you try to figure it out
But sadly even if #15 less of an heavy error , it still is one that can come due to anything
I'm not sure you actually make progress when trying own things and going around the issue.
Of course slower timings may give fractional% more stability , but thats not the point
System very much is usable with errors these days.
Just right now with you doing own changes - i again have no idea about the actual problem that is "currently" happening.
Don't go around the issue.
Please try suggestions and continue from there.
Your report reads like you made the issue worse, but good to know how not to do it.
Still a learning experience. 🤭
Looking forward for new updates.
Needs testet VPP_MEM , needs testet higher delta in mem that may expose new errors
And then we have to see what the actual current problem is
The new current problem is just bad, please revert.
You are right. I need more time to find the issues, but I was able to run 8 minutes Y about 4 times with these combinations.
Even on SA 1.18V was able to run 1-2 rounds before error, this was impossible with the C38 profile I tried before.
Maybe the RTT training is better on higher Voltage headroom.
I have to play with the variances of Voltages.
I believe I need higher MEM VDDQ to stabilize it and that what I can't use on 8600 C38, because 1.52V MEM VDD is enough there.
You are right. I need more time to find the issues, but I was able to run 8 minutes Y about 4 times with these combinations.
Even on SA 1.18V was able to run 1-2 rounds before error, this was impossible with the C38 profile I tried before.
Maybe the RTT training is better on higher Voltage headroom.
I have to play with the variances of Voltages.
I believe I need higher MEM VDDQ to stabilize it and that what I can't use on 8600 C38, because 1.52V MEM VDD is enough there.
I think 4 things
~ it doesnt bother that you run higher voltage for lets say a slower profile. You will have to fix and not get around noise issues. SNR issue will come due to high voltage, no way around than slowly optimize on it.
~ slower CAS from CPU side, may lower voltage requirements on VDD2 or VDDQ_CPU, but ultimately it makes no change. Slightly lowers strain but its fractional.
~ timings are just a bonus, they will not hinder or benefit you to reach high clock. They are a bonus of how good powering you can get or how little clock strain is.
~ There shouldn't be a need to finetune CPU to MEM voltages that much. 8600 is not extreme clock. The error must be somewhere else, even if reports say voltage jitter errors.
8800 is what i at the end of the day want to see from you. 8600 is your current goal~
Keep working hard
8600 is time to put out other changes than those common.
But lets slowly focus on what we have without RX-DFE preset.
If you found delta on 8400 , 8533 for the CPU side ~ there is no reason it will not work on 8600.
If you really want to tripple verify things
Build on 8600 profile, jump to 8533 , change nothing and see how high voltage + high delta, you can get away with and stabilize it.
You want to have more mem voltage headroom, not less. We target more voltage.
Voltage at the end means nothing by itself.
Once you keep improving dimm-pcb stability at high voltage, then it will scale beneficial at lower voltage. Exception clock specific filtering tuning.
Soo if you dont see the issue of why mem pcb is unstable, push more voltage through it and maybe downclock cpu to isolate that variable away.
Timings , eh are just a bonus ~ if not completely broken, not so important by themselves
EDIT:
I can remind that increasing IA supply is another variable. High clock may need more.
How can we know its not CPU that causes bad signal~
Step by step. Changing timings is currently not the error reported. Soo not a reason to prioritize it, nor search for bandaids.
It may also be time to start tracking the board as a variable
isolate each channel like 1? week ago requested
and start to figure out if something else is hindering you.
May be time to start going per channel RTT, per channel RON, per dimm PMIC
tho i think the board is solid
Shouldnt be in this state with "just 8600".
For the mainboard that should be nothing.
8800 now, maybe~
Please try to not make new variables changing timings, which will change RTLs too.
Isolate current variables first.
Easy "fix" is using DFE ~ but need of 2ndary DFE means signal is noisy and or training is suboptimal.
Try to find a resolve for that first & consider to isolate channels too.
Beitrag automatisch zusammengeführt:
Alternative alternative to have more fun, is maybe going gear 4 @tibcsi0407
That isolates your mem variable.
Rest of learned behavior scales the same
10 000 MT/s strap with 96MHz BCLK
You target 9600MT/s as entry for Gear 4. Not lower~
// i heard 9600MT/s strap @ 100MHz is harder ~ can't verify, but cant deny either.
This will force you to fix noise issues on DIMM PCB
And i would recommend to use RX-DFE on this clock now.
CTL0 is unclear
you can auto that, board does good at Gear4
Unclear if needed for 10k loaded strap or for 9600 result speed.
VDD2_CPU likely needs around 1.58-1.62v
SA is ok how it is.
VDDQ_CPU you adapt as always.
You can run Term PLL as 1.1v here. It will mess with voltages, but its ok
// EDIT: ~ Term PLL 1.1v will require lower VDD2_CPU (in case CPU has trouble with +1.62v), 1080mV might cause no change at all.
// "Issue" will be #00h Debug code which requires PSU-OFF CMOS.
You can run CPU_AUX as 1.9v here too.
It is also ok to run one channel only till you get consistent boots , but ultimately both have to run & pass TM5.
Good luck 🤭
Make a profile. There will be many resets.
I think 4 things
~ it doesnt bother that you run higher voltage for lets say a slower profile. You will have to fix and not get around noise issues. SNR issue will come due to high voltage, no way around than slowly optimize on it.
~ slower CAS from CPU side, may lower voltage requirements on VDD2 or VDDQ_CPU, but ultimately it makes no change. Slightly lowers strain but its fractional.
~ timings are just a bonus, they will not hinder or benefit you to reach high clock. They are a bonus of how good powering you can get or how little clock strain is.
~ There shouldn't be a need to finetune CPU to MEM voltages that much. 8600 is not extreme clock. The error must be somewhere else, even if reports say voltage jitter errors.
8800 is what i at the end of the day want to see from you. 8600 is your current goal~
Keep working hard
8600 is time to put out other changes than those common.
But lets slowly focus on what we have without RX-DFE preset.
If you found delta on 8400 , 8533 for the CPU side ~ there is no reason it will not work on 8600.
If you really want to tripple verify things
Build on 8600 profile, jump to 8533 , change nothing and see how high voltage + high delta, you can get away with and stabilize it.
You want to have more mem voltage headroom, not less. We target more voltage.
Voltage at the end means nothing by itself.
Once you keep improving dimm-pcb stability at high voltage, then it will scale beneficial at lower voltage. Exception clock specific filtering tuning.
Soo if you dont see the issue of why mem pcb is unstable, push more voltage through it and maybe downclock cpu to isolate that variable away.
Timings , eh are just a bonus ~ if not completely broken, not so important by themselves
EDIT:
I can remind that increasing IA supply is another variable. High clock may need more.
How can we know its not CPU that causes bad signal~
Step by step. Changing timings is currently not the error reported. Soo not a reason to prioritize it, nor search for bandaids.
Beitrag automatisch zusammengeführt:
It may also be time to start tracking the board as a variable
isolate each channel like 1? week ago requested
and start to figure out if something else is hindering you.
May be time to start going per channel RTT, per channel RON, per dimm PMIC
tho i think the board is solid
Shouldnt be in this state with "just 8600".
For the mainboard that should be nothing.
8800 now, maybe~
Please try to not make new variables changing timings, which will change RTLs too.
Isolate current variables first.
Easy "fix" is using DFE ~ but need of 2ndary DFE means signal is noisy and or training is suboptimal.
Try to find a resolve for that first & consider to isolate channels too.
Beitrag automatisch zusammengeführt:
Alternative alternative to have more fun, is maybe going gear 4 @tibcsi0407
That isolates your mem variable.
Rest of learned behavior scales the same
10 000 MT/s strap with 96MHz BCLK
You target 9600MT/s as entry for Gear 4. Not lower~
// i heard 9600MT/s strap @ 100MHz is harder ~ can't verify, but cant deny either.
This will force you to fix noise issues on DIMM PCB
And i would recommend to use RX-DFE on this clock now.
CTL0 is unclear
you can auto that, board does good at Gear4
Unclear if needed for 10k loaded strap or for 9600 result speed.
VDD2_CPU likely needs around 1.58-1.62v
SA is ok how it is.
VDDQ_CPU you adapt as always.
You can run Term PLL as 1.1v here. It will mess with voltages, but its ok
// EDIT: ~ Term PLL 1.1v will require lower VDD2_CPU (in case CPU has trouble with +1.62v), 1080mV might cause no change at all.
// "Issue" will be #00h Debug code which requires PSU-OFF CMOS.
You can run CPU_AUX as 1.9v here too.
It is also ok to run one channel only till you get consistent boots , but ultimately both have to run & pass TM5.
Good luck 🤭
Make a profile. There will be many resets.
The per channel test is still waiting.
In my opinion the board shouldn't be an issue, I can boot on 8800 and even bench it. Once tried TM5, error spammed 1,5 minutes later, but didn't spend time on that profile, I would like to do it step by step.
As you suggested I will try to raise IA_AC and use the 8533 or the 8400 profile as a base.
I am still very busy in the work with my tight deadlines, but trying to steal some time always for some test runs.
Gear 4 is fun, but let's find the end of the gear 2 first.
I will report back later, hope I can find the key settings.
So, wollte mal Rückmeldung bezüglich des Colorful geben.
Also das BIOS ist wirklich übersichtlich. Es gibt keine Möglichkeit die CPU zu undervolten, lediglich P1 kann eingestellt werden.
Dazu gibt es keine Speicherplätze fürOC Profile! D.h. nach einem fehlgeschlagenen OC Versuch darf man alles schön neu eintippen. Das macht besonders bei meinen Hynix Green ohne xmp Profil richtig Spaß.
Auch werden gerne die Spannungsänderungen nicht übernommen.
Ich habe noch ein zweites Kit günstig erstanden und folgendes damit "geschafft": Anhang anzeigen 965254
Leider habe ich vergessen die BIOS Einstellungen zu fotografieren
Beitrag automatisch zusammengeführt:
Hier noch die Vielfalt im BIOS.
Verbesserungsvorschläge für die Spannungseinstellungen sind willkommen.
Sollte es. Ist ein Austauschboard oder repariert diesen Monat.
Wenn ich mir allerdings die Dimm Slots anschaue, wie die verlötet sind, und das mit Igorslab Bildern vergleiche, ist das eher ein altes, weil es schlecht verlötet aussieht.
Hört sich aber definitiv nicht danach an. @IronAge hattest du nicht immer die Bilder parat auf denen man den Unterschied zwischen den beiden apex Versionen sieht?
Vielleicht hilft es dir. Oder die rev mal checken, glaube die war auch ne andere. War meine ich über dem ersten pcie slot rechts.
Be careful about the lowest curve points.,
700mV is quite low. It may or may not if you change things around become too low.
But it is ok how it is right now. Just need an "ok" from you too for "many task" tests.
That is geekbench, cinebench, actually cine R15 extreme i got recommended is quite evil now (keep your ICCMAX enabled)
And i guess games are dynamic enough load, to figure out curve issues. Instability on clock between 2100-4500 is not easy to track~
What you want at least with y-cruncher stability, is it not hitting PL4
Ring will be an issue, but a powerlimiited Ring at whatever clock, is less of a ... good idea.
Just not needed and pushes VID requests uselessly high.
tyty i did drop the first 2 v/fs a lil bit just so it wouldn't be riding the edge of 700mV, should I also be setting VR Limit to like 1700 while using ICCMAX 400a? or is that not needed, still debating on adding power limits but I only hit 290w or so while benchmarking so probably fine? since no games come close to that so far
Ja scheisse, hätte ich das gewusst, hätte ich es nicht genommen.
Das stand in der Auktion:
"Info:
Neues Austauschboard mit besserem Speichersupport siehe IrgorsLab Artikel
TOP Zustand inkl. Zubehör!"
Ich sehe jetzt zwei Optionen. Verkaufen oder mit einem USB Flasher das Bios zurückspielen, damit non K BCLK OC geht, denn dafür dürfte der Memtakt reichen. Müsste ich mir aber neu besorgen.
tyty i did drop the first 2 v/fs a lil bit just so it wouldn't be riding the edge of 700mV, should I also be setting VR Limit to like 1700 while using ICCMAX 400a? or is that not needed, still debating on adding power limits but I only hit 290w or so while benchmarking so probably fine? since no games come close to that so far
I dont want you to stay at 9600MT/s
But take a visit, to make errors more clear
Later come back with the fixed issue.
Noisy foundation, to get it fully stable.
Memory fails. But not dimms fault.
May be more fun than every 50min errors on G2
Outcome and target of work is the same
Er bezieht sich auf Xaver seinen Artikel und er hatte meine ich über die 22er Boards berichtet.
Aber 2022 Boards gab es nicht wie Sand am Meer. Einige wenige haben eins über vitamin b bekommen und der ein oder andere hatte das Glück eins über die rma zu ergattern.
Es gab auch viele die es ein paar mal probiert haben und immer wieder nur ein 2021 bekommen haben.
Also haben die meisten Pest gegen Cholera getauscht. Am ende war es dann nur eins das evtl 200-400mhz geschafft hat. Aber weiterhin ein 2021.
Einer war komplett Ausfall, meist nur max 6000-6400. Tendenz eher 6000 und der zweite ging meist von 6400-6800. 6800 waren dann aber schon die Perlen unter den Katastrophen. Das 2022 hat dann mit den alten mdies spielend 6800 gemacht und mehr je nach Güte des kits und imcs.
Problem war zu der Zeit das man halt eher imc limitiert war in der Region.
Mit dem 13er war mit meinen a dies direkt 7600 plug and play (2022er Modell)
