[Sammelthread] Intel DDR5 RAM OC Thread

[Vhypur]

another new beta bios, gonna do some tests later and see how it is

 

[Holzmann]

another new beta bios,

Wo?

 

[Vhypur]

Wo?

safedisk posted them on ocn idk if i can link that here or link his stuff but its on the asus z790 motherboard thread at the end for both apex and encore

 

[Holzmann]

I see

[OFFICIAL] Asus Strix/Maximus Z790 Owners Thread

www.overclock.net

 

[Digg]

Und was wird mit dem Test Bios getestet? Auch dieses CEP? Kam auch für das Z690 Apex raus als beta.

 

[snakeeyes]

Ist unser comp bios für den Gskill Oc Cup.

Sollte aber auch daily ordentlich sein.

 

[AndreasP1981]

@Veii
Neuer Kühler, Supercool Direct-Die, selbe Voltage Settings wie zuvor.
Original Befestigung, kein Mountingframe bzw Direct-Die mit befestigungsrahmen.
Zack 7800 statt 7600

 

[CarSalesman]

This could be due to the IHS. A delid / relid with TGC would help you a lot on your CPU temps.

Maybe. It could also be the same with direct die like it is for me.

 

[tibcsi0407]

Maybe. It could also be the same with direct die like it is for me.

Maybe your die surface uneven.Could be the block too. I have Iceman ATM. On long stress tests the E cores are hotter than P cores.

 

[Veii]

Good timezone

@Veii
Neuer Kühler, Supercool Direct-Die, selbe Voltage Settings wie zuvor.
Original Befestigung, kein Mountingframe bzw Direct-Die mit befestigungsrahmen.
Zack 7800 statt 7600
Anhang anzeigen 974192

Bist du auf einem 250W powerlimit ? Ich sehe Unlimited, also HT-Off ??
Du verlierst etwa 50% der Computeleistung mit dem OC.
Womöglich ist es sogar langsamer als "stock".

7800MT/s sitzt nahe 1.37 * 10^10

Als Orientierungs-Beispiel:
14900K 8P 16E 8200 MT/s ~ 1.42 * 10^10
14900K 8P 16E 8400 MT/s ~ 1.45 * 10^10
12900K AVX512 8P 0E 7000MT/s 4.9GHz ~ 1.12 * 10^10
14600K 6P 8E 5.4GHz DDR4-3600 G1 Nanya ~ 5.65 * 10^9
5600X Veii 6C 0E (4.55GHz) DDR4-4200 G1 ~ 5.58 * 10^9
14600K 6P 8E 5.3GHz DDR5-8200 ~ 8.28 * 10^9
14600K 6P 8E 5.3GHz DDR5-8400 ~ 8.29 * 10^9
14700K 8P 12E 5.0GHz DDR5-7800 ~ 1.14 * 10^10
Die letzten 14th gen Tests vom Kumpel sind auf einem Giga B760M AX X ,mit alleinigem Zugriff auf IA_AC_LL. Keine V/F Kurven.
14900KF 8P 16E 5.8/4.475 Fixed-XOC DDR4-4300 G1 ~ 1.09 * 10^10 && 5.7/4.5 XOC 4400 G1 ~ 1.08 * 10^10

Du kannst eindeutig bemerken wie weit entfernt du von dem eigentlichen Ziel bist.
Wenn DDR4 Systeme bzw CPUs mit halb so vielen Kernen, dich an der Rohleistung gleichsetzen.
Bzw wie Groß der Unterschied ist wenn Kerne einfach Fehlen.
Der 5.xx Unterschied zwischen 10^9 & 10^10 ist immens.
1.05 vs 1.4 ist ebenso immens. Da MemOC ComputePerf um 0.03-0.05 Schritte erhöht.

Entweder du hast HT aus, oder die E-Cores aus.
Oder du trottelst wirklich soo sehr dass du ~50% der Leistung verlierst.
Im Grundegenommen ist deine CPU langsamer als ein 14700 bei selben MemCLK.
E-cores on vs Off wäre spannnend zu vergleichen, jedoch muss bei dir einiges schieflaufen dass du soo schlecht abschneidest.
Ebenso spielt die Bandwidth/Kern eine Rolle, ob der MemOC überhaupt Sinn ergibt bzw Skalliert. Das gilt ebenso für die Programmlast. Wie viele Kerne sie anspricht.

Ich erwarte hier jedoch mindestens 1.20 * 10^10 von dir.
Wenn nicht sogar nahe 1.26*10^10.

Beitrag automatisch zusammengeführt: 24.02.2024

@tibcsi0407 if you're bored and want to do me a favor
Can you disable all E-Cores and run a short 2-3 cycle test of VT3 with HWInfo or HWMonitor open.

Any clock really. We know the +8000MT/s scale's. People still struggle to match your Boosting-Load, haha.
I'm curious how high in % the difference is between same P-Core amount.
Look how close 14600K vs 5600X are. Its silly.
VT3 is mostly Cache/Ring/Mem , back and forth. E-Cores just add offload-cache.

4 E-Cores on 14700K vs 14600K are around ~1.50 Factor of compute + slight boost due to 300MHz more.
For @AndreasP1981 score to make any sense. It must be HT off.
Or cores package throttle ~50%.

---

14700K @ 8200 should score around 1.28 * 10^10.
14900K @ 8200 does score around 1.42 * 10^10, iirc
Thats again "just 4 e-cores" more + boost diff.

 

[tibcsi0407]

Good time zone

Are you on a 250W power limit?
You lose about 50% of the compute performance with the OC.
It may even be slower than "stock".

7800MT/s sits close to 1.37 * 10^10

As an orientation example:
14900K 8P 16E 8200MT /s ~ 1.42 * 10^10
14900K 8P 16E 8400MT /s ~ 1.45 * 10^10
12900K AVX512 8P 0E 7000MT/s 4.9GHz ~ 1.12 * 10^10
14600K 6P 8E 5.4GHz DDR4-3600 G1 Nanya ~ 5.65 * 10 ^9
5600X Veii 6C 0E (4.55GHz) DDR4-4200 G1 ~ 5.58 * 10^9
14600K 6P 8E 5.3GHz DDR5- 8200 ~ 8.28 * 10^9
14600K 6P 8E 5.3GHz DDR5- 8400 ~ 8.29 * 10^9
14700K 8P 12E 5.0GHz DDR5- 7800 ~ 1.14 * 10^10
The last 14th gen tests from my buddy are on a Giga B760M AX X , with sole access to IA_AC_LL. No V/F curves.
14900KF 8P 16E 5.8/4.475 Fixed XOC DDR4- 4300 G1 ~ 1.09 * 10^10 && 5.7 /4.5

You can clearly notice how far away you are from the actual goal.
If DDR4 systems or CPUs with half as many cores, you have the same raw performance.
Or how big the difference is if cores are simply missing.
The 5.xx difference between 10^9 & 10^10 is immense.
1.05 vs 1.4 is equally immense. Since MemOC increases ComputePerf by 0.03-0.05 steps.

Either you have HT out, or the E-Cores out.
Or you really plod so hard that you lose ~50% of your performance.
Basically your CPU is slower than a 14700 with the same MemCLK.
E-cores on vs off would be exciting to compare, but there must be something going wrong for you to do so poorly.
The bandwidth/core also plays a role in whether the MemOC actually makes sense or scales. This also applies to the program load. How many cores it addresses.

However, I expect at least 1.20 * 10^10 from you here.
If not close to 1.26*10^10.

Beitrag automatisch zusammengeführt: 24.02.2024

@tibcsi0407 if you're bored and want to do me a favor
Can you disable all E-Cores and run a short 2-3 cycle test of VT3 with HWInfo or HWMonitor open.

Any clock really. We know the +8000MT/s scale's. People still struggle to match your boosting load, haha.
I'm curious how high in % the difference is between same P-Core amount.
Look how close 14600K vs 5600X are. It's silly.
VT3 is mostly Cache/Ring/Mem, back and forth. E-Cores just add offload cache.

4 E-Cores on 14700K vs 14600K are around ~1.50 Factor of compute + slight boost due to 300MHz more.
For @AndreasP1981 score to make any sense. It must be HT off.
Or cores package throttle ~50%.

---

14700K @ 8200 should score around 1.28 * 10^10.
14900K @ 8200 does score around 1.42 * 10^10, iirc
That's again "just 4 e-cores" more + boost diff.
Anhang anzeigen 974345

Seems E-cores are making a huge difference:
Used the same settings, 30GB mem loaded.

Just flashed the new BIOS, with E cores on it's still not okay, so you gave me an idea that something E core related makes the instability on new BIOS. Probably L2 needs more (or less) Voltage.
Now running VST/VT3 without E cores, I will post it a few cycles later (if it won't fail...)

 

[robonz]

7800MT/s sitzt nahe 1.37 * 10^10

Als Orientierungs-Beispiel:
14900K 8P 16E 8200 MT/s ~ 1.42 * 10^10
14900K 8P 16E 8400 MT/s ~ 1.45 * 10^10

Moin

These are rough estimates for 2* 16GB DIMMs. Pardon me, but tibcsi’s testing is irrelevant in regards to bitrate, because he’s only stressing 30GB out of 48GB.

@tibcsi0407 Maybe let us see some bitrate figures with the full available mem loaded?

 

[tibcsi0407]

Moin

These are rough estimates for 2* 16GB DIMMs. Pardon me, but tibcsi’s testing is irrelevant in regards to bitrate, because he’s only stressing 30GB out of 48GB.

@tibcsi0407 Maybe let us see some bitrate figures with the full available mem loaded?

I can do that later. Unfortunately the new BIOS has the same issues as 1001, I have to figure out wtf happened. 😊

 

[Veii]

Moin

These are rough estimates for 16GB DIMMs. Pardon me, but tibcsi’s testing is irrelevant in regards to bitrate, because he’s only stressing 30GB out of 48GB.

Добро утро !

I think he shouldn't do that, mm mm

Else 2x16GB 8000MT/s ~ 1.38 * 10^10
// unlimited powerlimit but no curve tuning. Looks about where it has to be, subsystem is fully utilized and ~ +0.04 bump per 100MHz of QCLK.

If filling 48GB is slower, thats an Arch and potentially CPU operation issue.
Not to forget the OS limits and too high timings influence it. Its like 0.02 per bad timing state, haha.
VDDQ has also own ICCMAX , same as PMIC has own Current Limiters.

Soo at very least, i should expect from @AndreasP1981 1.33 * 10^10 not 1.20 * 10^10
I was too generous, whops. Thank you 🤭

Beitrag automatisch zusammengeführt: 24.02.2024

EDIT:

^ Friend

If one has to learn something from it.
~ ICCMAX covers much more than CPU cores
~ Some CPUs are simply unstable out of factory with unlimited limiters, and only hold 105° QA stability @ powerlimits.
~ ICCMAX is/i set to prevent transient overshoots. Tight limits will limit also maxOC.
~ Actual curve tuning to not hit ICCMAX is what i recommend. Tight limiters may fool stability
~ I/μOPS package-throttle range is huge on Intel. Ignore clock ignore voltage. Work with the boosting system, not against it.
~ Simple AC_LL change may lower power, but every change has side-effects. Don't cut IA_Supply.

Degradation is a multi fold topic. Its never "wattage" only. Neither is it thermals anymore.

 

[robonz]

Добро утро !
Anhang anzeigen 974349
I think he shouldn't do that, mm mm

Else 2x16GB 8000MT/s ~ 1.38 * 10^10
// unlimited powerlimit but no curve tuning. Looks about where it has to be, subsystem is fully utilized and ~ +0.04 bump per 100MHz of QCLK.
Anhang anzeigen 974350
If filling 48GB is slower, thats an Arch and potentially CPU operation issue.
Not to forget the OS limits and too high timings influence it.
VDDQ has also own ICCMAX , same as PMIC has own Current Limiters.

Soo at very least, i should expect from @AndreasP1981 1.32 * 10^10 not 1.20 * 10^10
I was too generous, whops. Thank you 🤭

I agree with the values for 2x16GB, but yeah working with 48GB is slower, it has to do with the batch size per node IME. Just like we see tibcsi‘s bitrate fall down when disabling the E-Cores which raises the batch size to 1.79GB/Node. I believe Andreas‘ performance is on point as is But let‘s see.

I can do that later. Unfortunately the new BIOS has the same issues as 1001, I have to figure out wtf happened. 😊

Even a relaxed 8400 profile would be good enough for comparison

 

[Veii]

I believe Andreas‘s performance is on point as is But let‘s see.

Sorry this i dont understand.
Ohhh, Andreas is on 24gb. Well ya ~ toucheé
I expected nobody to mess with y-cruncher and let the Dev optimize its own written Programm.

Bigger IC capacity is done due to extending Transistorcount per Bank.
Increasing density will not slow it down too much.
It will slow it on roundtrip because pure bank is bigger. Hence little more delay needs happen on RRDL

But i don't let tibcsi run RRDL 8.
It will mess with write-2-read tuning from CPU side.
Give and take, slow one down increase speed on another.

I (personally) remain skeptical in 24gb Dimms being slower in raw compute.
They maay, have a chance to become slower, but that may part should be resolved with fast enough access time on the CPU side.
Else higher density should be faster due to roundtrip-timings "need" being lower with higher density.
Sure they need to be higher and bruteforce access test aida may show lower potential max bandwidth

But Aida is silly.
it can be used for something & short (single IC) tests may also show slower score.
But those ... idk, they never even leave one IC let alone bankgroup. They are faar to small workload-size.
They can be used to test random test to test inconsistency aka bad tuning. But hey have no value to timing perf.

 

[tibcsi0407]

Even a relaxed 8400 profile would be good enough for comparison

That also needs some further testing, but I will do that. I want to know what the hell happened with the new BIOS releases. Somewhere saw that we have to use much smaller VDD2, but it needs investigation and time. 😊

 

[Veii]

That also needs some further testing, but I will do that. I want to know what the hell happened with the new BIOS releases. Somewhere saw that we have to use much smaller VDD2, but it needs investigation and time. 😊

Maybe ~ same IVR. Voltage itself means nothing, especially those IVR/MEM VDD/Q ones.
Just link voltages, there to create VREF. Amperage matching is all that matters. At whatever random voltage number it sits.
Are you a good hunter for amisce-win ?

Logically i can not share any proprietary tools, but maybe you can find some of them by yourself.
Any version above 5.04 or 5.05 should be fine.
// Usually HEDT/Enterprise pages ship update packages with them added.
// Sometimes our Boardpartners do too, but they face bigger consequences funnily.

With this you can enforce some VDDQ related timings and prevent random training.
Also can work on DFE a bit better. Those changes then stay on your profiles, even if Bios (GUI) menu's are missing.

I slowly become a bit better on VREF tuning. Should be more helpful now vs 5 months ago.
No scope and no physical board of course is limiting me strongly ~ but i learn every day a bit more

PS:
Stay on the new "OG" Bios ~ the 1001 "Beta".
Usually XOC (Comp) bioses, are G4 optimized and have more training randomness in them.
Booting vs Stability that we aim, are different types of tuning.

EDIT:
I saw they replaced it with 1002.
Any case, added link to 1001.
Whoever fights with whoever @ HQ 🤭

 

[tibcsi0407]

Are you a good hunter for amisce-win ?

I don't know that, is it a BIOS editor?

 

[robonz]

Sorry this i dont understand.
Ohhh, Andreas is on 24gb. Well ya ~ toucheé
I expected nobody to mess with y-cruncher and let the Dev optimize its own written Programm.

Bigger IC capacity is done due to extending Transistorcount per Bank.
Increasing density will not slow it down too much.
It will slow it on roundtrip because pure ban is bigger. Hence little more delay needs happen on RRDL

But i don't let tibcsi run RRDL 8.
It will mess with write-2-read tuning from CPU side.
Give and take, slow one down increase speed on another.

Yep, it’s not about the big numbers. Don‘t think anyone can successfully run RRDL 8 on H24M through any of the common test tools at these frequencies Just like the primaries and RFC need to be looser. As for Y this would sit at around 1.4GB/Node on the i9 for the CPU side computation, hence the lower bitrate. It’s just my experience with all the different CPUs I‘ve tested.

 

[Veii]

I don't know that, is it a BIOS editor?

Variable editor of Database.
One of the ways to access removed GUI-Menu options.

---

Soo it looks?
WhiteAPEX 9901_2002 Base ~ Safedisk
EncoreApex 9901_1002 Base ~ Safedisk
Final 2002/1002 Base ~ Safedisk

2001/1001 "OG" Base ~ Shamino ? 89% Confident.
Whoever fights with whoever @ HQ. You guys missed to edit WhiteAPEX page. You only changed Encore Page yesterday.
But talk about 2002 base, that's not on the site, haha.

Ahh silly heads.
Don't fight. You guys work at the same company ~ even with personal tuning differences 🤭🤭
Its funny from outsider perspective~~

APEX White:
https://dlcdnets.asus.com/pub/ASUS/mb/BIOS/ROG-MAXIMUS-Z790-APEX-ASUS-1801.zip
https://dlcdnets.asus.com/pub/ASUS/mb/BIOS/ROG-MAXIMUS-Z790-APEX-ASUS-1904.zip
https://dlcdnets.asus.com/pub/ASUS/MB/bios/ROG-MAXIMUS-Z790-APEX-ASUS-2001.zip ~ SM ?
https://dlcdnets.asus.com/pub/ASUS/mb/BIOS/ROG-MAXIMUS-Z790-APEX-ASUS-2002.zip ~ SD ?

APEX Black:
https://dlcdnets.asus.com/pub/ASUS/mb/BIOS/ROG-MAXIMUS-Z790-APEX-ENCORE-ASUS-0801.zip
https://dlcdnets.asus.com/pub/ASUS/mb/BIOS/ROG-MAXIMUS-Z790-APEX-ENCORE-ASUS-0904.zip
https://dlcdnets.asus.com/pub/ASUS/MB/bios/ROG-MAXIMUS-Z790-APEX-ENCORE-ASUS-1001.zip ~ SM ?
https://dlcdnets.asus.com/pub/ASUS/mb/BIOS/ROG-MAXIMUS-Z790-APEX-ENCORE-ASUS-1002.zip ~ SD ?

Idk who fights with whom, but you two are big silly heads ! 😋
First with BB now with SM 🙊🙉🙈
BB & SM work before coexisted in peace. Alpha & Beta turned to final.
Now its a casting show. Well its noticeable since some time now~

Unsure about 3rd player either, but get your stuff together 🤭
It can be that i mess up database order and its the exact opposite.
You silly heads run before .ZIP vs .zip. Now you run /MB/ vs /mb/
Such a trouble indexing.

---

EDIT:
Well that was fast
Thank you for stalking me ♥️

Thursday 22nd, 19:00 JST

Today, 24th 16:00 JST

Now, 16:30 JST

Good Ty
Other way around was just confusing.
Please keep your inter-hq fights , hidden.
Its funny that "i" do notice again. Of all people.

 

[zebra_hun]

For your Tabelle:
Run my 3 saved profiles, 8000 isn't stable. Short run on daily W11, all backgroundprocess running. This isn't a bench OS.
7200, 7600, and 8000MHz:

Bonus Pic for 8000, but it's on W10 Revi OS. Number are better. On normal W11 it has no PL4 Limit, but on W10 with modded Power Plan, idle PL4 Limit. Just on idle, load Y C never.

8000 on modded W10 Revi OS

Maybe help some results to see (Bits/sec)


Edit:
I wanted a good quality pic share, quick tested on W10 and a screen saved. Here is no XBox, Steam, etc. Clear Revi OS. Bits/sec is better. Sorry, this 8000 profil isn't stable, but ram oc 99.99% stable. I need more Vcore... Over 1.20V load i don't want set it up. For 7200 right ~1.16V, 7600 ~1.19V, but 8000 i need 1.20V + This is 300W+ ... Over 1.20V i don't wanna go higher. Crap cpu.

8000 New better Quality

 

[tibcsi0407]

Variable editor of Database.
One of the ways to access removed GUI-Menu options.

---

Soo it looks?
WhiteAPEX 9901_2002 Base ~ Safedisk
EncoreApex 9901_1002 Base ~ Safedisk
Final 2002/1002 Base ~ Safedisk

2001/1001 "OG" Base ~ Shamino ? 89% Confident.
Whoever fights with whoever @ HQ. You guys missed to edit WhiteAPEX page. You only changed Encore Page yesterday.
But talk about 2002 base, that's not on the site, haha.

Ahh silly heads.
Don't fight. You guys work at the same company ~ even with personal tuning differences 🤭🤭
Its funny from outsider perspective~~

APEX White:
https://dlcdnets.asus.com/pub/ASUS/mb/BIOS/ROG-MAXIMUS-Z790-APEX-ASUS-1801.zip
https://dlcdnets.asus.com/pub/ASUS/mb/BIOS/ROG-MAXIMUS-Z790-APEX-ASUS-1904.zip
https://dlcdnets.asus.com/pub/ASUS/MB/bios/ROG-MAXIMUS-Z790-APEX-ASUS-2001.zip ~ SM ?
https://dlcdnets.asus.com/pub/ASUS/mb/BIOS/ROG-MAXIMUS-Z790-APEX-ASUS-2002.zip ~ SD ?

APEX Black:
https://dlcdnets.asus.com/pub/ASUS/mb/BIOS/ROG-MAXIMUS-Z790-APEX-ENCORE-ASUS-0801.zip
https://dlcdnets.asus.com/pub/ASUS/mb/BIOS/ROG-MAXIMUS-Z790-APEX-ENCORE-ASUS-0904.zip
https://dlcdnets.asus.com/pub/ASUS/MB/bios/ROG-MAXIMUS-Z790-APEX-ENCORE-ASUS-1001.zip ~ SM ?
https://dlcdnets.asus.com/pub/ASUS/mb/BIOS/ROG-MAXIMUS-Z790-APEX-ENCORE-ASUS-1002.zip ~ SD ?

Idk who fights with whom, but you two are big silly heads ! 😋
First with BB now with SM 🙊🙉🙈
BB & SM work before coexisted in peace. Alpha & Beta turned to final.
Now its a casting show. Well its noticeable since some time now~

Unsure about 3rd player either, but get your stuff together 🤭
It can be that i mess up database order and its the exact opposite.
You silly heads run before .ZIP vs .zip. Now you run /MB/ vs /mb/
Such a trouble indexing.

---

EDIT:
Well that was fast
Thank you for stalking me ♥️

Thursday 22nd, 19:00 JST
Anhang anzeigen 974365
Today, 24th 16:00 JST
Anhang anzeigen 974366
Now, 16:30 JST
Anhang anzeigen 974367
Good Ty
Other way around was just confusing.
Please keep your inter-hq fights , hidden.
Its funny that "i" do notice again. Of all people.

What a mess.

 

[Veii]

What a mess.

Its fiiiine 🤭
Please test both Bioses for me 1001 & 1002.
I am not confident who maintains what. But recent actions are visible like a casting show.

I am slightly aware of persona, but it can be that i mistake Dev's here. Who released what.
Haven't found a reason to dig and check. I expect equal high level and professionalism when you title it Beta or Final.
For our target, we do may be interested in who made what. Because both Dev's have their own way of tuning. And of course i have my own ways too;
Downgrading Bioses to resolve instability may pass. Because this is enthusiast SKU.

But hearing "Encore can't be stable on stock vs white Apex" from normal customers ~ it is a bit embarrassing.
Not only to Dev's, but also to engineers who designed those beautiful Boards.
I , me, shouldn't even bother. But i like the results and hold high respect to some of the HQ people.
It is a fun place to what i hear & some are self taught like me. Probably more hard-working.

Soo i expect to not embarrass themselves. If that means that i am sometimes the bad person, its ok.
I expect much more perfectionism, because if novice me notices such little things & high paying consumers are unhappy~
Do better That's all~~

---

EDIT:
If i could put out one wish.
Work together and for customers who already are confused what "beta" means or afraid to flash.
Please mutually check others work or whatever there is that will be published to the big mass (webpage).

Don't do a running contest. It just causes confusion.
And ontop, don't edit-away other Dev's Bios. This is just rude and causes even more confusion.
Take an example how other Boardpartner's handle it.
Why are normal users supposed to go and database dig for an old Bios that worked. Or even worse, was link-wiped.
Not needed;
1 month, 3 month ago ok, but not 1-2 days ago.
X4D, X5D ASUS page (troll) situation was equally embarrassing. Same core reason, Inter-HQ trouble shouldn't leak out;

I guess it will help having an own Team who manages that Webpage, instead of the Devs themselves.
Less chance of random embarrassment for basically no reason.
And cleaner dev-2-community communication. It will be known what is beta and what is final.
Approving beta for mass (webpage) & then wiping it, or casting for #1 place on webpage. Come on guys , don't be silly.

Beitrag automatisch zusammengeführt: 24.02.2024

Hm, could be interesting. BIOS support is questionable.

Maybe,
But we can work on it.

No reports, no edgecases why it doesnt. No reports = no Bios improvement need.
I expect it to work well.
Micron were ones who help industry the most by not creating NDA's on "basic" information about their Hardware.

And researching further + actively.
They were big help early on. Were help for Keysight. Its all a mutual collaborative work
Nothing moves if one is stingy and attempts to own control. Or limits access. Such stufff~

Same industry and equal pushing.
Don't think other (InHouse) OCer, or Memory Vendor employed OCer are not looking for inspiration to everyone else.
If one Team improves and figures something out, its on them if they want to bring industry forward or keep it for themselves.
Any case ~ FW digging to learn, is common procedure. Often its friendly RL communication too.

Only "our?" (extreme) overclocking field is full or rivalism with competition-fire/toxicity.
I don't like it and don't compete in that field. Its like some say, indeed a casting show, haha.

Anywho, i think Micron Dimms deserve some checking.
Those at least when they release.
To see how far they are with actual JEDEC-5600 kits, vs JEDEC 4800 Hynix 24GB samples.
Samsungs new 4GB ICs will likely also be very interesting. If we learn the mindset of "timings are just a bonus, a bonus you earn by good powering 1st, and good design 2nd".

There is room to scale clock higher~~
2000MHz QCLK is nothing. Look at AMD ~ 3000-3300MHz.

Hi @Veii, thanks for your answer. I didn't know that it was a new feature of the 14th gen, in my graph it is more noticeable how the peak of the PCores occurs at a maximum of 89 and the P7 shoots up to 97. I'm limited by my cooling capacity to run YC and not even think in SFT where the Package Power is surely going to 330W. I have to make an undervolt using the curve, I was thinking if it is more convenient to achieve a more positive slope if, for example, I raise almost all the points by +10mV (except P3 which I must correct because it goes to the floor), and then with AC, which By default in LLC4 it is 0.269, could I try later to lower it to 0.2, is the rational ok? I mean, thinking that my CPU reaches 6GHz at 1.423V according to its factory V/F

Please listen to me that you should be Thermal-Throttle stable.
It is a way to make life easier saying you need cooling. But that is just a bonus for higher clock.
It is not a requirement for stability. Silicon Foldover point is not low 80°C. Not anymore.
A stability that is based on a cold Mainboard with cold CPU.
What happens if summer comes.

I tuned on Allu Coolers for a long time. Cheap 30-40$ coolers as it was all i could afford.
Now its cheap AIOs and things got easier.
Please work harder
It is common practice to thermal throttle. Its much cleaner throttle than emergency power throttle.
There is no such thing as "sample runs 300W for 1 hour = it's degraded or even dead", to what i read
Don't be the person that looks for an easy way out. You can do it~~
If it needs more voltage, so be it. But it may be a side issue in "why" it needs more (masking??) voltage.
Work hard~

Ok, I'm going to do that, could I start with 8000, which is the XMP Profile? Something you told me is that VDDQ and TX are a fixed variable, my question is if I should take as an initial value, for example, 1.45V (which is the XMP value for 8000 2x16 A-die) for a 1.25v TX? , or do I look for a lower value, for example 1.4V (mem) / 1.2 (tx) as borders? That is my great doubt!

XMP is XMP
7800 i think is fully guaranteed to work on APEX's at this bios state.
To what i can stalk communities.

I would go and say 7200MT/s baseline is good for tuning margins and voltages.
Orienting to low level targets and specs followed.
But 7800 should be plenty on this Board.

The problem is that APEXs trains nearly everything. Helpful and a problem.
For example the B760M AX X only boots if VDDQ is within 15mV perfect when you disable VDDQ Training.
This makes figuring out correct voltage easier.

Adaptive MR10-12 ~ yea good for compatibility
But we shouldnt even focus on that, when there is randomness and inconsistency issues.
Aka "it doesnt train well auto" - issues.
This should have first and highest priority before releasing a final Bios. Not having more training randomness that masks the issues.
Lookup-tables are not a bad thing per-se. It becomes a bad thing when you lack access to some options. Soo you are stuck then.

Soo such needs to be carefully tuned and given access to enable and disable training of it.
Any case, you want to figure out stability with highest possible and lowest possible IVR VDDQ delta.
SA will mess with it.

Of this margin, you take the half which is what will work
And of this half, you push it a bit higher near max margins. Soo you know around where the stay when OCing further. Around 80-85% of margins is ok.
Margins get lower by worse noise.
Work on foundation and scale that thing up. Not only push push push, without refining foundation.
Its fully fine to drop clock when you are refining foundation. You want less variables, not more.

 

[Mtorrent]

But hearing "Encore can't be stable on stock vs white Apex" from normal customers ~ it is a bit embarrassing.

This is an interesting point. There was silence for two months, and now that the KS is about to come out, they may try to show off. Buying an Apex is a Pay2Win, as has been said many times, but I never thought that the Encore would have so many retraining problems. Then I changed the focus, trying to leave everything in Auto and trusting the BIOS, but I still have a lot of instability in SI, fundamentally looking for the delta, something that I think if you didn't mention it a while ago in OCN, no one was talking about it. Now I'm trying your SA advice on 1.14, VDDQ_Mem/TX deltas, and super low MC with an XMP profile. My case is simple and basic, because I am looking for stability and efficiency, not a score, but the rest, who do not understand why the not-so-new 8400@1.4 mems dont work, I think that is where the problem comes from, managing that frustration. The worrying thing is not the internal competition, but that there is no strong external competition in 1DPC. I'm going to try 1001 in one BIOS and 1002 in the second, with values in AUTO and then looking for the delta, to see if I notice any difference at 8000MT/s. Thank you for your contribution always.. doing a little research on SceWin

PS:I still have the spikes at P7, but I found out why the temperature rose so much, I had just tested AC at 0.3, which is not that high compared to my default value in LLC4 at 0.269. That difference and the adjustment of my V/F at P3 (+30mV), triggered the SVID and for this reason, in the transitions they made me reach thermal throttling.

I wonder why the OCTool reading indicates a lower value than the BIOS V/F, for example, 800MHz in my case should achieve 729v, however the OC Tool shows me 711v, and so on. Should I leave everything at default in LLC3 so that the factory values of the V/F can be seen?

 

[Veii]

The worrying thing is not the internal competition, but that there is no strong external competition in 1DPC.

Also !
But , a big big chunk is lack of userbase education.
I do my part and things i get wrong i correct.

From early "Veii is a troll", to now "Veii i need your help" ~ haha.
Some names i remember~~

There are many good Boards out there.
I mentioned one now 3 times. The Gigabyte B760M AX X & Z790 Pro X.
White 2DPC Board. But its not 1DPC.
Lack of 1DPC is unfortunate, and over perfectionistic focus is not done on an ITX Board.

Its just the market doesnt need our pushing.
We OCer, XOCer or OC-Researchers, are a fractional userbase vs the global mass.
But when we have " a board is unstable at stock " ~ now that becomes a huge issue.
I hope you/you understand why i'm harsh sometimes.
We are our little community, but "gamers" instability is inacceptable. Its sad for the engineering that went into this board.
This counts for other Boards & Boardpartners too.

Why does MSI have it soo difficult with slopes. Their EDGE lineup needs rework. Z690/Z790i needs RTT and slope rework.
Why does ASRock have it difficult with silk and Renesas OC mode. PMIC-Bricking Green/Black sticks & not leaving memory area clean. Where is Z690 AQUA community support on self-caused PCB issue.
Why does Gigabyte have it difficult to follow JEDEC 🤭😋 sorry but some things are very silly predicted ~ topic CCDL, or transition-timings haha.
Why does Biostar have no well build ITX boards. Its unfortunate.
Why does the ASUS TUF lineup get intentionally downgraded in Bios options.
aand so on ♥️

ASUS does good in Bios tuning, that's why people pay high prices. Looks matters too.
I feel the ROG tax is high too, but it is what it is.
Needs more competition and more public education.
Then whole industry moves forward~~

I'm going to try 1001 in one BIOS and 1002 in the second, with values in AUTO and then looking for the delta,

Use Bios flashback.
Then do clear CMOS after flashback light turns off.
On Boot , load defaults, F10 save and exit and only then go and change things around in the next boot.

This is to prevent as best as possible old bugs, or ME stuck changes.
Can't give out cleaner way to do it. This is how it should be done

Flashback doesnt do a full flash either, but its ok.

PS:I still have the spikes at P7, but I found out why the temperature rose so much, I had just tested AC at 0.3, which is not that high compared to my default value in LLC4 at 0.269. That difference and the adjustment of my V/F at P3 (+30mV), triggered the SVID and for this reason, in the transitions they made me reach thermal throttling.

I can currently not say how much is influenced due to CPU aware overrides.
AC/DC Telemetry faking is an exploit.
It should not be used.

I can't say how current Boosting System corrects for lack of voltage, but it definitely tried to keep up stability
It even tries to keep up clock-straps, and package-throttles internally. Even with CEPs off.
There is more to this rabbit hole
Any case, use Curve Tuning not IA_LL supply cutting please.
You do much much more harm with supply cutting. Harm in the terms of instability. Because there is more than core/ring/cache.
All is loadbalanced.

I wonder why the OCTool reading indicates a lower value than the BIOS V/F, for example, 800MHz in my case should achieve 729v, however the OC Tool shows me 711v, and so on. Should I leave everything at default in LLC3 so that the factory values of the V/F can be seen?

Fused Curve vs Target Curve vs VID.
3 different things
TVB Voltage optimization changes it. SVID Presets change it.
Supply modification which is now at IA_AC 0.5ohm, vs 1.1ohm ~ messes with it

The rabbit hole is deep on options consumer doesnt see.
But ... this should not be consumers worry.
Things have to just work~
Nobody should go through lengths to understand it. OCers ok, but even then "it should just work".

 

[perlibu]

Die Berichte klingen nach einem überdruck Problem. Bzw eher ein krummer mount
Unterlegscheiben unter der Backplate erhöhen sogar den Druck davon.
Kannst du mir bitte den MC-SP 5x nacheinander auslesen lassen und mir die Werte davon durchgeben
Eins nach dem anderen.

CPU Write error.
WTR zu hoch.
WTRS immer 8 oder niedriger
WTRL meinstens doppelt RRDL mit ausnahmen.
tWR immer über WTRL mit ausnahmen.

#8 jedoch gehört der CPU. Meistens
CPU instabil. Wie erwähnt, bitte um ein remount bzw um ein 5*MC-SP check.
Federschrauben nur mit den fingerspitzen reindrehen.
Bzw anfangs gerne mit dem Schraubenzieher ansetzen und max andrehen, dann rausdrehen und alle 4 Schrauben mit den Fingerspitzen halten und reindrehen bis man nicht mehr kann.

Werde den sp noch auslesen. Habe mal die Schrauben bisschen gelockert. Habe erstmal verusucht WTRS und WTRL anzupassen. Hab jetzt 24 und 8 eingestellt. Hatte aber RRD_SG und RRD_dg gefixt.
Nach 25 min kam error 3. Also wtrl, wtrs Problem.

Nun versuche ich mal mit auto bei RRDSG und RRDDG. Bei 24/8 stellt es mir auf RRDSG 68 und RRDDG 52.

 

[amd_man_bavarian]

Mahlzeit.

Ich hab noch ein bissel optimiert und würde gerne wissen was ihr davon haltet bzw wo ich noch Hand anlegen sollte oder ob es so schon gut aussieht. Bisjetzt bin ich zufrieden auch wenn ich gerne >8000 hätte. Aber lieber die 8000 Stable als nix

SA 1,131V , VddqTx 1,35V , IMCVdd 1,35V , VDD 1,425V , VDDQ 1,41V / VDD2 1,42V , VDDQ2 1,4V



Ich habe VDD/VDDQ für beide bänke unterschiedlich gesetzt da auf der zweiten Bank immer etwas mehr war.Nun ist es die meiste Zeit gleich.

 

[Veii]

Nach 25 min kam error 3. Also wtrl, wtrs Problem.

VDDQ error, sehr warscheinlich
WTR is korrekt so.
Write errors können von der CPU kommen, da diese die Writes kontrolliert.
Die Reads werden innerhalb des Ramspeichers ausgeführt.
Die Writes dürfen specifications brechen, da wir 2 individuelle MC-Links haben, welche das tBurstChop 8 limit leicht umgehen.

Reads müssen jedoch auf den RAM warten und somit bleibt BurstLength 16, bzw BurstChop 8.
Jeder Read geschieht in 8er clocks. Keine 7 keine 9.
8 , verschoben 12, oder doppelt von 8 = 16

 

[perlibu]

Anhang anzeigen 974495
Anhang anzeigen 974496

VDDQ error, sehr warscheinlich
WTR is korrekt so.
Write errors können von der CPU kommen, da diese die Writes kontrolliert.
Die Reads werden innerhalb des Ramspeichers ausgeführt.
Die Writes dürfen specifications brechen, da wir 2 individuelle MC-Links haben, welche das tBurstChop 8 limit leicht umgehen.

Reads müssen jedoch auf den RAM warten und somit bleibt BurstLength 16, bzw BurstChop 8.
Jeder Read geschieht in 8er clocks. Keine 7 keine 9.
8 , verschoben 12, oder doppelt von 8 = 16

Vddq höher stellen?

Was bedeutet das nun mit dem Read? Wtrs und wtrl so lassen oder 8-16 verstellen? 🙄