I.nfraR.ed
Profi
- Mitglied seit
- 27.04.2020
- Beiträge
- 68
It's based on one of the DFI official bioses (one of the 200MHz tables), but I don't remember which one exactly. There were several tables with only one difference - reg 68.
I think it was one of the later beta bioses, 505 maybe, but the table might be present in other bioses as well.
Btw, changelog for N24LD6191 says: To include the micro codes of mobile CPUs.
Maybe we can take a look at it and see if we can port it to our boards and what effect it has?
LPNF2UBDB24
1. To also support FSB200 CPU with CPU clock at 100MHz.
2. To enhance the support of AMD 55-Watt Low Power CPU.
I.don't know what these add - microcode or romsip, but maybe worth checking.
There are other interesting things in other bioses - like some mentions about 8x 8.5x multi fixes for FSB over 200MHz, tables above 200MHz updates. Etc.
http://www.lejabeach.com/DFI/BIOS/dfiultrabbios.html
I think it was one of the later beta bioses, 505 maybe, but the table might be present in other bioses as well.
Btw, changelog for N24LD6191 says: To include the micro codes of mobile CPUs.
Maybe we can take a look at it and see if we can port it to our boards and what effect it has?
LPNF2UBDB24
1. To also support FSB200 CPU with CPU clock at 100MHz.
2. To enhance the support of AMD 55-Watt Low Power CPU.
I.don't know what these add - microcode or romsip, but maybe worth checking.
There are other interesting things in other bioses - like some mentions about 8x 8.5x multi fixes for FSB over 200MHz, tables above 200MHz updates. Etc.
http://www.lejabeach.com/DFI/BIOS/dfiultrabbios.html
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