Ratio CMOS Setting: 9
FSB Frequency: 445
CPU Clock Skew: Auto
NB Clock Skew: Auto
FSB Strap to North Bridge: 333
DRAM Frequency: DDR2 1069
DRAM CLK Skew on Channel A1: Auto 350
DRAM CLK Skew on Channel A2: Auto 350
DRAM CLK Skew on Channel B1: Auto 350
DRAM CLK Skew on Channel B2: Auto 350
DRAM Timing Control: maunuell
1st Information:
CAS# Latency: 5
DRAM RAS# to CAS# Delay: 5
DRAM RAS# Precharge: 5
DRAM RAS# Activate to Precharge: 15
RAS# to RAS# Delay: Auto
Row Refresh Recycle Time: Auto
Write Recovery Time: Auto
Read to Precharge Time: Auto
2nd Information:
Read to Write Delay (S/D): Auto
Write to Read Delay (S): Auto
Write to Read Delay (D): Auto
Read to Read Delay (S): Auto
Read to Read Delay (D): Auto
Write to Write Delay (S): Auto
Write to Write Delay (D): Auto
3rd Information:
Write to PRE Delay: Auto
Read to PRE Delay: Auto
PRE to PRE Delay: Auto
All PRE to ACT Delay: Auto
All PRE to REF Delay: Auto
DRAM Static Read Control: Auto
DRAM Read Training: disabled
MEM. OC Charger: enabled
Ai Clock Twister: light
Ai Transaction Booster: Auto
Common Performance Level: Auto
Pull-in of CHA PH1: Enabled
Pull-in of CHA PH2: Enabled
Pull-in of CHA PH3: Enabled
Pull-in of CHB PH1: Enabled
Pull-in of CHB PH2: Enabled
Pull-in of CHB PH3: Enabled
PCIE Frequency: 100
CPU Voltage: 1,30
CPU PLL Voltage: 1,553
FSB Termination Voltage: 1,298
DRAM Voltage: 2,19
North Bridge Voltage: 1,298
South Bridge 1.5 Voltage: 1,500
South Bridge 1.1 Voltage: 1,10
CPU GTL Reference (0): Auto
CPU GTL Reference (1): Auto
CPU GTL Reference (2): Auto
CPU GTL Reference (3): Auto
NB GTL Reference: Auto
DDR2 ChA Reference Voltage: Auto
DDR2 ChB Reference Voltage: Auto
North Bridge DDR Reference: Auto
CPU Configuration:
Ratio CMOS Setting: 9
C1E Support: Enabled
Max CPUID Value Limit: Disabled
Intel Virtualization Tech: Disabled
CPU TM Function: Enabled
Execute Disable Bit: Enabled
Load-Line Calibration: enabled
CPU Spread Spectrum: Disabled
PCIE Spread Spectrum: Disabled