[Sammelthread] Intel DDR5 RAM OC Thread

[tibcsi0407]

This is interesting:

https://videocardz.com/newz/msi-shows-off-z790-motherboard-with-compact-ddr5-camm2-module

 

[CarSalesman]

Er hat sie von 1.05 auf 1.1 angehoben.
Ich sehe da überhaupt kein Problem drin, wenn man in diesem Bereich bleibt und nicht noch weiter wild anhebt.

I've played with this voltage and it clearly does make a difference to the DDR5 environment, but it certainly hasn't been a miracle fix and I've since returned it to AUTO.

 

[Darkthrone]

After spending so much time trying to get 8000 stable, I tested each dimm on each slot alone.
One dimm on each slot at 8000c36
VDD/VDDQ 1.47/1.41 (1.45/1.40 also TM5 stable)
SAT 1.20 (bios value)
TX1.29 (bios value)
MC 1.4125 (bios value)
VDDQ training off/MRC fast boot off/fast boot off

One dimm pass 2 full loops of VST/VT3 on both slots.
Second dimm fail instantly on first slot (closest to cpu) and pass 2 full loops on second slot. So I keep that in the second slot and put the other dimm in the first slot.
Reboot with both dimms and it fail immediately.
So what is my issue now? Bad dim?

Tried to clear CMOS and start again, VDD/VDDQ 1.45/1.40, SA 1.15-1.22, TX 1.20-1.32, MC 1.35-1.45
Tried Pull-Up/Down 48-40/40-48
Ctl0DqVrefUP/DOWN 170/88

Nothing seems to work. Max I could get was 1 full loop of VST/VT3. TM5 Usmus is stable for a quick 6 loops.

 

[Veii]

@Darkthrone
You need to consider that plugged dimms create a load.
Disabling both MC-Links per "channel", slot ~ is how you test slots.
Removing one dimm changes load.

RON messing is no magical resolve
Neither are the values working for all scenario's.
Its specific to the encore @ strong ODT (low SA)

No test has any weight if bellow 45-90min.
EDIT:
Also there are multiple revisions of the same SKU
multiple apex and likely different encores.
Soo those values will differ.

---

@tibcsi0407 & @CarSalesman
Did you manage to make progress on SAGV and VRMAX ?

 

[tibcsi0407]

Did you manage to make progress on SAGV and VRMAX ?

I am struggling with something else.
When I flooded my top slot I was able to revive it, but seems like it degraded my memory channel somehow, maybe some short circuit or something.
Tried to clean slots, reseat the CPU etc, but my top slot could run only on 8200 max, for the bottom one 8600 wasn't an issue.

So today I installed my good old KF back to find out is it my board, or the CPU, but seems like it's the KS..
The KF was able to run with some fast settings 8 minutes Y on 8800 (on air) in the "bad" slot, so seems like the KS damaged somehow..
Shit happens.
I made a deep cleaning to the CPU cleaned every SMD and contacts, will retest it again later.
Also thinking on to put back my MC SP 90 13900 KS in the slot and see how it performs in the Encore.

 

[Veii]

Its very hard to believe you could @tibcsi0407
Due to send power towards slots always ending to ground, its waste.
Its bi directional, but still hard to believe.
Most end at VSS.

I wonder really
But even if you flood the 24pin
It would force a PSU off and at worse take that away. But even here, the PSU will protect itself from such "single cable" short

I would reconsider and to inspect the backside of the board
If anything looks corroded or burned.

Due to what i understand so far, this is very difficult and close to impossible due to ground amount
On Mainboard and on cpu pins.
Especially by how many parts have a protection against this scenario.
// or there is something i dont understand so far on design

Do you know if it flood it mid operation or on startup??

Edit:
The chance is much much higher for it to be just a training variable that let you run high clock on first plug-in.
You would have to flud specific rails (backside mostly) plus pcb coating be damaged , for this to have a chance to get back towards the cpu.
// and even then its effect is mitigated, or i should say "tamed"

Beitrag automatisch zusammengeführt: 27.05.2024

For example, its horrible and i dont recommend anybody to do this
But you can remove or plug in ram sticks in a powered state.
It hates it but it wont exactly fry it. Because it doesnt work like that
For example, this silly example also has protections against it, tho dont count on it.

I had to do this couple of times when you SPD corrupt one dimm,
but the system doesnt want to pass a boot check with it plugged (sodimm or udimm)
~ yet you need it plugged in order to flash it repaired. It was an init/timing scenario

Things just dont work that way
Else atmosphere between pins and housing/shell on the board
would most definitely condensate on XOC and cause the same you describe.
Exception here "variable" is conductivity rating on waterdroplets @ basically zero °C.
And filling the slot with vasiline will mess with ramOC strongly.

But ya the point stays ~ things don't work that way 🤭

 

[tibcsi0407]

Its very hard to believe you could @tibcsi0407
Due to send power towards slots always ending to ground, its waste.
Its bi directional, but still hard to believe.
Most end at VSS.

I wonder really
But even if you flood the 24pin
It would force a PSU off and at worse take that away. But even here, the PSU will protect itself from such "single cable" short

I would reconsider and to inspect the backside of the board
If anything looks corroded or burned.

Due to what i understand so far, this is very difficult and close to impossible due to ground amount
On Mainboard and on cpu pins.
Especially by how many parts have a protection against this scenario.
// or there is something i dont understand so far on design

Do you know if it flood it mid operation or on startup??

Edit:
The chance is much much higher for it to be just a training variable that let you run high clock on first plug-in.
You would have to flud specific rails (backside mostly) plus pcb coating be damaged , for this to have a chance to get back towards the cpu.
// and even then its effect is mitigated, or i should say "tamed"

Beitrag automatisch zusammengeführt: 27.05.2024

For example, its horrible and i dont recommend anybody to do this
But you can remove or plug in ram sticks in a powered state.
It hates it but it wont exactly fry it. Because it doesnt work like that
For example, this silly example also has protections against it, tho dont count on it.

I had to do this couple of times when you SPD corrupt one dimm,
but the system doesnt want to pass a boot check with it plugged (sodimm or udimm)
~ yet you need it plugged in order to flash it repaired. It was an init/timing scenario

Things just dont work that way
Else atmosphere between pins and housing/shell on the board
would most definitely condensate on XOC and cause the same you describe.
Exception here "variable" is conductivity rating on waterdroplets @ subzero.
And filling the slot with vasiline will mess with ramOC strongly.

But ya the point stays ~ things don't work that way 🤭

I don't think it's the board, since the KF was able to do 8800 in the slot where the KS could only 8200.
I've tried everything, CMOS reset, remove battery, BIOS reflash, BIOS switch, reseating, differenct CPU block, different dimms.

Only the different CPU helped. So I can say it can only be the CPU which got a minor damage in IMC part. Still can run 8200, which is not bad, but hey, it was better..
A minor Voltage jump can kill it, so I don't know, maybe it got a small shock.
It happened during the boot actually.

On 8400 in Y and TM5 insta kick me out, no matter what I set.
Just put in the KF and it was like plug and play...

 

[Veii]

It happened during the boot actually.

Then i can believe it to be a bigger shock.
In a running state this would have been fine.

Dimms can take 2.1-2.2v before going into flames
CPU technically can take a lot too, but for a short time
Training have protections

Just put in the KF and it was like plug and play...

Yea first training is somewhy full , always after a bios reflash.
Its better training for some reason, longer duration too.

 

[tibcsi0407]

Then i can believe it to be a bigger shock.
In a running state this would have been fine.

Dimms can take 2.1-2.2v before going into flames
CPU technically can take a lot too, but for a short time
Training have protections


Yea first training is somewhy full , always after a bios reflash.
Its better training for some reason, longer duration too.

Yes, even if you put the same cpu back it will retrain everything according to the seating in the socket.

I will try the KS again tomorrow morning. But I am afraid it won't come back.
Actually CPU part had no issue, it worked like charm on the same Vcore as before.

Things like this happen when you "play" too much with tha hardware. I can only blame myself, but tbh I never liked thic CPU.
Maybe I will buy a prebinned one and see how it performs.

 

[Veii]

Actually CPU part had no issue, it worked like charm on the same Vcore as before.

Alone if you continue with this theory, several IP blocks would have damage
i cant believe.

One of them is RingClk instabillity.

 

[tibcsi0407]

Alone if you continue with this theory, several IP blocks would have damage
i cant believe.

One of them is RingClk instabillity.

I loaded the Intel default profile too. SFT worked like charm. And also, 8200 worked like charm, even on C34. (maybe that was the problem, haha )

 

[Veii]

If one MC block got some damage, maybe you need to reconsider the RONs
Funny thing Madness hit 8800 on the Z790i lightning (+ y-cruncher) , on same RONs
Maybe there are magical indeed

 

[tibcsi0407]

If one MC block got some damage, maybe you need to reconsider the RONs
Funny thing Madness hit 8800 on the Z790i lightning (+ y-cruncher) , on same RONs
Maybe there are magical indeed

I don't know if it would help. I tried with manual RON's (with the 48/40-40/48) and with auto. No difference.
The error is instant in Y, like when you have not enough SA or VDD2.
I was thinking, if my board would be damaged, I would buy a Tachyon X to challenge a little.

 

[Veii]

I was thinking, if my board would be damaged, I would buy a Tachyon X to challenge a little.

Funnily the Z790i lightning gets better results than the Tachyon : ')
Tachyon owner need to work harder~~

You can go the path of least expensive, if you want
vs the most expensive one
I'm sure you'll learn valuable things, when struggling with low price boards and having to do bios mods.
Its at the end not boards fault.

EDIT:
There is an (old), new company on the block that might want bit modding touches
But runs a great pcb design ~ for low prices.
Could be fun to explore when we get no more freedom the biggest Boardpartner.

 

[tibcsi0407]

Funnily the Z790i lightning gets better results than the Tachyon : ')
Tachyon owner need to work harder~~

You can go the path of least expensive, if you want
vs the most expensive one
I'm sure you'll learn valuable things, when struggling with low price boards and having to do bios mods.
Its at the end not boards fault.

Yes, that little board is the GOAT, but I have 4 NVME SSD's, so it's a no go for me.
Saw Tachyon X on a pretty good price, it's around 600 Euros (with VAT) at some shops.
The only thing I don't like it's the E-ATX factor.

Are the Skews exposed in their BIOS? I had Z690 Ultra, but I don't remember unfortunately.

 

[Veii]

Are the Skews exposed in their BIOS? I had Z690 Ultra, but I don't remember unfortunately.

Uhh i dont remember
i have to ask a friend with the tachyon or dissect the rom.
// The X series is just an improvement on the HW side, with a tiny visual change on the ROM side & security change (both at the same time).

you got RTTs and you got RX-DFU presets
I am not sure about slopes.
RON exists, gladly now on ASRock's Boards too
// EDIT: the biggest change on Giga boards is, that things either train or they dont post at all.
// Bad VDDQ penality, is harsh. Its always no post.
// Unlike with ASUS boards where many things can try to get stable for some duration and get useful on XOC


On ASUS we have 35% visibility of stuff (https://www.hardwareluxx.de/community/threads/intel-ddr5-ram-oc-thread.1306827/post-30390693 oh its gone already)
On ASRock we have 25? % of it, but the important ones
On MSI and Giga we have 20%? of it.

Generally we are blind, "we" the normal consumers.
Soo what are +/- 5% if tuning is good, its fine
~ well for me its not, as i'm not an "overclocker" anymore, but you talk against a wall here

In reality close to nobody bothers, else such loss of options wouldn't be tolerated.
In reality people want a functional bios, without much technical explanation of the complicated things.
Thats all majority cares about , and a boardpartner that gives a good warranty policy + doesn't take more than 48h to answer.

 

[tibcsi0407]

Uhh i dont remember
i have to ask a friend with the tachyon or dissect the rom.
// The X series is just an improvement on the HW side, with a tiny visual change on the ROM side & security change (both at the same time).

you got RTTs and you got RX-DFU presets
I am not sure about slopes.
RON exists, gladly now on ASRock's Boards too
// EDIT: the biggest change on Giga boards is, that things either train or they dont post at all.
// Bad VDDQ penality, is harsh. Its always no post.
// Unlike with ASUS boards where many things can try to get stable for some duration and get useful on XOC


On ASUS we have 35% visibility of stuff (https://www.hardwareluxx.de/community/threads/intel-ddr5-ram-oc-thread.1306827/post-30390693 oh its gone already)
On ASRock we have 25? % of it, but the important ones
On MSI and Giga we have 20%? of it.

Generally we are blind, "we" the normal consumers.
Soo what are +/- 5% if tuning is good, its fine
~ well for me its not, as i'm not an "overclocker" anymore, but you talk against a wall here

In reality close to nobody bothers, else such loss of options wouldn't be tolerated.
In reality people want a functional bios, without much technical explanation of the complicated things.
Thats all majority cares about , and a boardpartner that gives a good warranty policy + doesn't take more than 48h to answer.

It's not easy. I can just hope that on next gen Asrock will continue from here where they are now with the Z790i lightning.
Saw the new Epyc AM5 CPU's. They are quite good actually from my point of view.

 

[Veii]

Saw the new Epyc AM5 CPU's. They are quite good actually from my point of view.

Yea improved IF, X series has 3D cache, hopefully dual CCD cache
may be great as an AI / compute cpu

completely new design
The APUs are fun for sure.
But you lack bios options freedom.

At least on the Server environment, you have more access.
Wish it was RDIMM tho . . .
Real dualrank would be great feeding the huge cache.

Beitrag automatisch zusammengeführt: 27.05.2024

It's not easy

I mean its not hard at all
But its hard dealing with higher ppl then~~

 

[CarSalesman]

@tibcsi0407 & @CarSalesman
Did you manage to make progress on SAGV and VRMAX ?

I got 8400c34 to run 2.5hrs of VST/VT3 in 20second iterations before error, RxDfe off. Becareful24 told me that's as good as it gets without debug menu.

SA 1.20, VDD2 1.425, TX 1.225, VDDQ_mem 1.42, VDD_mem 1.60, ParkDQS 60, CMD/CTL Drive Strength Up/Dn 2D [Disabled], CMD CTL CLK Slew Rate [Disabled], CMD/CTL DS & E 2D [Disabled]. This is text dump to BIOS settings: https://www.overclock.net/posts/29332691/

Don't know if you saw my post in ASUS Z790 thread on OCN. The BIOS yeeted Vcore to 1.72 despite having VRMax at 1.500. https://www.overclock.net/posts/29332253/

It isn't occurring anymore since I got it stable, but it seems like the DDR5 environment crashing caused everything to go haywire.

Now I'm on to 8600 but I think it is beyond the capabilities of this IMC.

Beitrag automatisch zusammengeführt: 28.05.2024

// EDIT: the biggest change on Giga boards is, that things either train or they dont post at all.
// Bad VDDQ penality, is harsh. Its always no post.

I prefer this type of behavior. Z790 Kingpin is this way. Saves times and prevents mistaken hopefulness.

 

[Veii]

I got 8400c34 to run 2.5hrs of VST/VT3 in 20second iterations before error, RxDfe off. Becareful24 told me that's as good as it gets without debug menu.

You chose to accept defeat ?

Checked your OCN post, i see how things are.
This would explain in who's mind "CMD/CTL DS & E 2D [Disabled]" ~ idea was.

Don't know if you saw my post in ASUS Z790 thread on OCN. The BIOS yeeted Vcore to 1.72 despite having VRMax at 1.500. https://www.overclock.net/posts/29332253/

mmmmm
This may happen due to PPP and PT4 like Igorslab explained.
It is scary tho. The throttle basically means that it was not a fake readout and behaved exactly as it should.
// which is how it should be, if boardpartners get their ICCMAX, Curve and VRMAX together. PT4 and TDC included;
In non listening scenario's, you might have a dead cpu or strongly degraded by now. Ty for listening~

EDIT:
To assure you more, those spikes and insta kills usually happen on training not mid load.
Some sensor must have had crashed for this to happen, although its embarrassing (not for you) that this exists.
Reminds me of the GENE and blobbed AM5 substrates, where we kept hiding boosting behavior in a bios.
And later removed diesense tracking , as it was showing that the issue-indicator remained active and overshooting
... in a bios state, where boosting should not be allowed , where i'm sure AMD didnt change their mind on this
Probably really related to PT4 limit not following ICCMAX (slightly over it), but who knows - has those vibes again

Now I'm on to 8600 but I think it is beyond the capabilities of this IMC.

I think no.
But not one IP Block

Good timezone

ParkDQS 60,

Why

 

[CarSalesman]

You chose to accept defeat ?

Checked your OCN post, i see how things are.
This would explain in who's mind "CMD/CTL DS & E 2D [Disabled]" ~ idea was.

I was advised this is success.

CMD/CTL DS & E 2D [Disabled] <----my idea, along with CMD/CTL Drive Strength Up/Dn 2D [Disabled], and CMD CTL CLK Slew Rate [Disabled]

What do you advise if I have CTL0's set but everything else on AUTO? Should I:

1. Set everything manually?

2. Re-enable one or more of the three of the trainings?

 

[Veii]

CMD/CTL DS & E 2D [Disabled] <----my idea, along with CMD/CTL Drive Strength Up/Dn 2D [Disabled], and CMD CTL CLK Slew Rate [Disabled]

Here you have three things
Basic signal, signal drive+filter, signal phase+speed
You combine all 3 , to cover just one category change on signal alignment.
They are different things, slopes are not the resolve to everything. How its feed matters , not the opposite.
Not 100% confident on "E" meaning.

Then we have

*Official* Intel DDR5 OC and 24/7 daily Memory Stability...

www.overclock.net

Using logic alone.

Your defined margins due to CTL0, aka your [Redacted] suggestions given by helper
Cause you no favor.
A point of a good VREF is a high margin.
You achieved the opposite by the person focusing soo much on pin-point stability, without factoring variance.
Your tuned values which they seems started to remake a 3rd time, probably just so they are different and can be "their own" again

Caused a limitation of margins, not an increase.
I advice to rethink that path & if corresponding researcher also reads that~~
Rethink the outcome by logic

If its indifferentiable to ASUS "high binned" tuning scenario (old),
How do we differentiate it again like what was the achievement here.

We need more margins not less margins 🤭
And the least we need, is confidential data.
I don't know~

See , blurring s*kks
Just a reminder that we go nowhere with this proprietary mentality.
And especially if researcher spends soo much lifetime for himself, just to keep things secret.

What do you advise if I have CTL0's set but everything else on AUTO? Should I:

CTL1+CTL2 are different from CTL0.
If you+helper mess with CTL1+2, they mess with training delay and RTT.
If X messes with VPP, they mess with the same ~ training delay, voltage strength, and phase alignment
Falling into the same rabbit hole you are right now ~ inconsistent thermal variance and bad thermal stability.

Remember i push you to 100° y-cruncher stable ~ early days

Advice,
Probably dont bother.
You put your focus on the wrong path.
Especially as CTL0 ODT is sample unique, and here even by logic ~ will never be SA scaling.
Nor will be board to board or cpu to cpu replicable.
I don't know~

Beitrag automatisch zusammengeführt: 28.05.2024

EDIT:
Given i remember this person and their way of work
I think they've fallen into the trap of learning from ASUS (rutool, hex) work and matching Down's as a flat thing.
This only functions if Board is build perfect, and even then, you can't just put a DOWN baseline and expect it to work

There are far too many outer factors, that prevent such a book-like perfect scenario (of tuning)
Book-like "perfect" tuning scenario only works @ the lab and design stage.
Yet even that will not guarantee perfect outcome without variance.

Soo even if lets say "i" was PCB designer and all checks pass.
They will never be identical in outcome past design and past silk step.

Now adding CPU variance and dynamic ODT to this topic.
You simply can not run them at the same duration and same endpoint.
That is for all that make DQ and all that make DQS.
Training exists because its required.

I think researcher fell into this rabbit hole.
Remembering old talk and seeing concurrent outcome (bad margins)

 

[Darkthrone]

@Darkthrone
You need to consider that plugged dimms create a load.
Disabling both MC-Links per "channel", slot ~ is how you test slots.
Removing one dimm changes load.

Tested as you suggested. Both dimms installed. Each disabled through bios.

SlotA Enabled/SlotB Disabled

SlotA Disabled/SlotB Enabled

SlotA+B Enabled

 

[Veii]

Tested as you suggested. Both dimms installed. Each disabled through bios.

Funny that slot B has lower bandwidth, slightly.
This sounds like a ring issue tbh. Can you export me the Bios config ?

Do you pass 2-3 rounds of CB15 Extreme (benchmate) ?
Without it crashing ?

 

[tibcsi0407]

Funny that slot B has lower bandwidth, slightly.
This sounds like a ring issue tbh. Can you export me the Bios config ?

Do you pass 2-3 rounds of CB15 Extreme (benchmate) ?
Without it crashing ?

For me it's strange that his IVR TX dropping below 1V. Something strange happens on that rail.
My IVR TX only dropping some mV below the set value.

In my opinion SA is too much too (1,12V should be enough for 8000). TX seem also too much for that memVDDQ.

 

[Veii]

For me it's strange that his IVR TX dropping below 1V. Something strange happens on that rail.
My IVR TX only dropping some mV below the set value.

Mm mm
It can be due to powerlimiters or due to instability.
Its a dynamic voltage at the end

 

[tibcsi0407]

Mm mm
It can be due to powerlimiters or due to instability.
Its a dynamic voltage at the end

Never saw it dropping that huge. Even on very unstable environment it stays around the set value.
Look at his two per channel test above, both stays around 1.32V.

 

[Darkthrone]

Funny that slot B has lower bandwidth, slightly.
This sounds like a ring issue tbh. Can you export me the Bios config ?

Do you pass 2-3 rounds of CB15 Extreme (benchmate) ?
Without it crashing ?

It can pass everything and CB15 Extreme no issues. I feed it with 1.1208-1.137v under load just for VST/VT3 while it only needs like 1.09-1.1v for 56/44/44

Spoiler: Bios.txt

[2024/05/28 14:13:51]
Ai Overclock Tuner [XMP II]
XMP [DDR5-7200 34-42-42-84-2N-1.40V-1.40V]
BCLK Frequency [100.0000]
PCIE Frequency [100.0000]
Intel(R) Adaptive Boost Technology [Auto]
ASUS MultiCore Enhancement [Auto – Lets BIOS Optimize]
SVID Behavior [Auto]
BCLK Frequency : DRAM Frequency Ratio [Auto]
Memory Controller : DRAM Frequency Ratio [Auto]
DRAM Frequency [DDR5-8000MHz]
DIMM Flex [Disabled]
Performance Core Ratio [Sync All Cores]
ALL-Core Ratio Limit [56]
Performance Core0 Specific Ratio Limit [Auto]
Performance Core0 specific Voltage [Auto]
Performance Core1 Specific Ratio Limit [Auto]
Performance Core1 specific Voltage [Auto]
Performance Core2 Specific Ratio Limit [Auto]
Performance Core2 specific Voltage [Auto]
Performance Core3 Specific Ratio Limit [Auto]
Performance Core3 specific Voltage [Auto]
*Performance Core4 Specific Ratio Limit [Auto]
Performance Core4 specific Voltage [Auto]
*Performance Core5 Specific Ratio Limit [Auto]
Performance Core5 specific Voltage [Auto]
Performance Core6 Specific Ratio Limit [Auto]
Performance Core6 specific Voltage [Auto]
Performance Core7 Specific Ratio Limit [Auto]
Performance Core7 specific Voltage [Auto]
Efficient Core Ratio [Sync All Cores]
ALL-Core Ratio Limit [44]
Efficient Core Group0 Specific Ratio Limit [Auto]
Efficient Core Group0 specific Voltage [Auto]
Efficient Core Group1 Specific Ratio Limit [Auto]
Efficient Core Group1 specific Voltage [Auto]
Efficient Core Group2 Specific Ratio Limit [Auto]
Efficient Core Group2 specific Voltage [Auto]
Efficient Core Group3 Specific Ratio Limit [Auto]
Efficient Core Group3 specific Voltage [Auto]
AVX2 [Auto]
AVX2 Ratio Offset to per-core Ratio Limit [Auto]
AVX2 Voltage Guardband Scale Factor [Auto]
Maximus Tweak [Mode 2]
DRAM CAS# Latency [36]
DRAM RAS# to CAS# Delay Read [48]
DRAM RAS# to CAS# Delay Write [48]
DRAM RAS# PRE Time [48]
DRAM RAS# ACT Time [60]
DRAM Command Rate [2N]
DRAM RAS# to RAS# Delay L [10]
DRAM RAS# to RAS# Delay S [8]
DRAM REF Cycle Time 2 [512]
DRAM REF Cycle Time Same Bank [416]
DRAM Refresh Interval [65535]
DRAM WRITE Recovery Time [Auto]
DRAM READ to PRE Time [12]
DRAM FOUR ACT WIN Time [32]
DRAM WRITE to READ Delay L [Auto]
DRAM WRITE to READ Delay S [Auto]
DRAM CKE Minimum Pulse Width [20]
DRAM Write Latency [34]
Ctl0 dqvrefup [Auto]
Ctl0 dqvrefdn [Auto]
Ctl0 dqodtvrefup [Auto]
Ctl0 dqodtvrefdn [Auto]
Ctl1 cmdvrefup [Auto]
Ctl1 ctlvrefup [Auto]
Ctl1 clkvrefup [Auto]
Ctl1 ckecsvrefup [Auto]
Ctl2 cmdvrefdn [Auto]
Ctl2 ctlvrefdn [Auto]
Ctl2 clkvrefdn [Auto]
Read Equalization RxEq Start Sign [-]
Read Equalization RxEq Start [Auto]
Read Equalization RxEq Stop Sign [-]
Read Equalization RxEq Stop [Auto]
ODT_READ_DURATION [Auto]
ODT_READ_DELAY [Auto]
ODT_WRITE_DURATION [Auto]
ODT_WRITE_DELAY [Auto]
DQ RTT WR [Auto]
DQ RTT NOM RD [Auto]
DQ RTT NOM WR [Auto]
DQ RTT PARK [Auto]
DQ RTT PARK DQS [Auto]
GroupA CA ODT [Auto]
GroupA CS ODT [Auto]
GroupA CK ODT [Auto]
GroupB CA ODT [Auto]
GroupB CS ODT [Auto]
GroupB CK ODT [Auto]
Pull-up Output Driver Impedance [Auto]
Pull-Down Output Driver Impedance [Auto]
DQ RTT WR [Auto]
DQ RTT NOM RD [Auto]
DQ RTT NOM WR [Auto]
DQ RTT PARK [Auto]
DQ RTT PARK DQS [Auto]
GroupA CA ODT [Auto]
GroupA CS ODT [Auto]
GroupA CK ODT [Auto]
GroupB CA ODT [Auto]
GroupB CS ODT [Auto]
GroupB CK ODT [Auto]
Pull-up Output Driver Impedance [Auto]
Pull-Down Output Driver Impedance [Auto]
Round Trip Latency Init Value MC0 CHA [Auto]
Round Trip Latency Max Value MC0 CHA [Auto]
Round Trip Latency Offset Value Mode Sign MC0 CHA [-]
Round Trip Latency Offset Value MC0 CHA [Auto]
Round Trip Latency Init Value MC0 CHB [Auto]
Round Trip Latency Max Value MC0 CHB [Auto]
Round Trip Latency Offset Value Mode Sign MC0 CHB [-]
Round Trip Latency Offset Value MC0 CHB [Auto]
Round Trip Latency Init Value MC1 CHA [Auto]
Round Trip Latency Max Value MC1 CHA [Auto]
Round Trip Latency Offset Value Mode Sign MC1 CHA [-]
Round Trip Latency Offset Value MC1 CHA [Auto]
Round Trip Latency Init Value MC1 CHB [Auto]
Round Trip Latency Max Value MC1 CHB [Auto]
Round Trip Latency Offset Value Mode Sign MC1 CHB [-]
Round Trip Latency Offset Value MC1 CHB [Auto]
Round Trip Latency MC0 CHA R0 [Auto]
Round Trip Latency MC0 CHA R1 [Auto]
Round Trip Latency MC0 CHA R2 [0]
Round Trip Latency MC0 CHA R3 [0]
Round Trip Latency MC0 CHA R4 [0]
Round Trip Latency MC0 CHA R5 [0]
Round Trip Latency MC0 CHA R6 [0]
Round Trip Latency MC0 CHA R7 [0]
Round Trip Latency MC0 CHB R0 [Auto]
Round Trip Latency MC0 CHB R1 [Auto]
Round Trip Latency MC0 CHB R2 [0]
Round Trip Latency MC0 CHB R3 [0]
Round Trip Latency MC0 CHB R4 [0]
Round Trip Latency MC0 CHB R5 [0]
Round Trip Latency MC0 CHB R6 [0]
Round Trip Latency MC0 CHB R7 [0]
Round Trip Latency MC1 CHA R0 [Auto]
Round Trip Latency MC1 CHA R1 [Auto]
Round Trip Latency MC1 CHA R2 [0]
Round Trip Latency MC1 CHA R3 [0]
Round Trip Latency MC1 CHA R4 [0]
Round Trip Latency MC1 CHA R5 [0]
Round Trip Latency MC1 CHA R6 [0]
Round Trip Latency MC1 CHA R7 [0]
Round Trip Latency MC1 CHB R0 [Auto]
Round Trip Latency MC1 CHB R1 [Auto]
Round Trip Latency MC1 CHB R2 [0]
Round Trip Latency MC1 CHB R3 [0]
Round Trip Latency MC1 CHB R4 [0]
Round Trip Latency MC1 CHB R5 [0]
Round Trip Latency MC1 CHB R6 [0]
Round Trip Latency MC1 CHB R7 [0]
Early Command Training [Auto]
SenseAmp Offset Training [Auto]
Early ReadMPR Timing Centering 2D [Auto]
Read MPR Training [Auto]
Receive Enable Training [Auto]
Jedec Write Leveling [Auto]
Early Write Time Centering 2D [Auto]
Early Read Time Centering 2D [Auto]
Write Timing Centering 1D [Auto]
Write Voltage Centering 1D [Auto]
Read Timing Centering 1D [Auto]
Read Timing Centering with JR [Auto]
Dimm ODT Training* [Auto]
Max RTT_WR [ODT Off]
DIMM RON Training* [Auto]
Write Drive Strength/Equalization 2D* [Auto]
Write Slew Rate Training* [Auto]
Read ODT Training* [Auto]
Comp Optimization Training [Auto]
Read Equalization Training* [Auto]
Read Amplifier Training* [Auto]
Write Timing Centering 2D [Auto]
Read Timing Centering 2D [Auto]
Command Voltage Centering [Auto]
Early Command Voltage Centering [Auto]
Write Voltage Centering 2D [Auto]
Read Voltage Centering 2D [Auto]
Late Command Training [Auto]
Round Trip Latency [Auto]
Turn Around Timing Training [Auto]
CMD CTL CLK Slew Rate [Auto]
CMD/CTL DS & E 2D [Auto]
Read Voltage Centering 1D [Auto]
TxDqTCO Comp Training* [Auto]
ClkTCO Comp Training* [Auto]
TxDqsTCO Comp Training* [Auto]
VccDLL Bypass Training [Auto]
CMD/CTL Drive Strength Up/Dn 2D [Auto]
DIMM CA ODT Training [Auto]
PanicVttDnLp Training* [Auto]
Read Vref Decap Training* [Auto]
Vddq Training [Disabled]
Duty Cycle Correction Training [Auto]
Periodic DCC [Auto]
Rank Margin Tool Per Bit [Auto]
DIMM DFE Training [Auto]
EARLY DIMM DFE Training [Auto]
Tx Dqs Dcc Training [Auto]
DRAM DCA Training [Auto]
Write Driver Strength Training [Auto]
Rank Margin Tool [Auto]
Memory Test [Auto]
DIMM SPD Alias Test [Auto]
Receive Enable Centering 1D [Auto]
Retrain Margin Check [Auto]
Write Drive Strength Up/Dn independently [Auto]
LPDDR DqDqs Re-Training [Auto]
Margin Check Limit [Disabled]
tRDRD_sg_Training [Auto]
tRDRD_sg_Runtime [16]
tRDRD_dg_Training [Auto]
tRDRD_dg_Runtime [8]
tRDWR_sg [20]
tRDWR_dg [20]
tWRWR_sg [16]
tWRWR_dg [8]
tWRRD_sg [64]
tWRRD_dg [54]
tRDRD_dr [0]
tRDRD_dd [0]
tRDWR_dr [0]
tRDWR_dd [0]
tWRWR_dr [0]
tWRWR_dd [0]
tWRRD_dr [0]
tWRRD_dd [0]
tRPRE [Auto]
tWPRE [Auto]
tWPOST [Auto]
tWRPRE [65]
tPRPDEN [2]
tRDPDEN [45]
tWRPDEN [66]
tCPDED [20]
tREFIX9 [Auto]
Ref Interval [Auto]
tXPDLL [Auto]
tXP [30]
tPPD [2]
tCCD_L_tDLLK [Auto]
tZQCAL [Auto]
tZQCS [Auto]
OREF_RI [Auto]
Refresh Watermarks [High]
Refresh Hp Wm [Auto]
Refresh Panic Wm [Auto]
Refresh Abr Release [Auto]
tXSDLL [Auto]
tZQOPER [Auto]
tMOD [Auto]
CounttREFIWhileRefEn [Auto]
HPRefOnMRS [Auto]
SRX Ref Debits [Auto]
RAISE BLK WAIT [Auto]
Ref Stagger En [Auto]
Ref Stagger Mode [Auto]
Disable Stolen Refresh [Auto]
En Ref Type Display [Auto]
Trefipulse Stagger Disable [Auto]
tRPab ext [Auto]
derating ext [Auto]
Allow 2cyc B2B LPDDR [Auto]
tCSH [Auto]
tCSL [Auto]
powerdown Enable [Auto]
idle length [Auto]
raise cke after exit latency [Auto]
powerdown latency [Auto]
powerdown length [Auto]
selfrefresh latency [Auto]
selfrefresh length [Auto]
ckevalid length [Auto]
ckevalid enable [Auto]
idle enable [Auto]
selfrefresh enable [Auto]
Address mirror [Auto]
no gear4 param divide [Auto]
x8 device [Auto]
no gear2 param divide [Auto]
ddr 1dpc split ranks on subch [Auto]
write0 enable [Auto]
MultiCycCmd [Auto]
WCKDiffLowInIdle [Auto]
PBR Disable [Auto]
PBR OOO Dis [Auto]
PBR Disable on hot [Auto]
PBR Exit on Idle Cnt [Auto]
tXSR [519]
Dec tCWL [Auto]
Add tCWL [Auto]
Add 1Qclk delay [Auto]
MRC Fast Boot [Disabled]
MCH Full Check [Auto]
Mem Over Clock Fail Count [1]
Training Profile [Standard Profile]
RxDfe [Auto]
Mrc Training Loop Count [Auto]
DRAM CLK Period [Auto]
Dll_bwsel [Auto]
Controller 0, Channel 0 Control [Enabled]
Controller 0, Channel 1 Control [Enabled]
Controller 1, Channel 0 Control [Enabled]
Controller 1, Channel 1 Control [Enabled]
MC_Vref0 [Auto]
MC_Vref1 [Auto]
MC_Vref2 [Auto]
Fine Granularity Refresh mode [Auto]
SDRAM Density Per Die [Auto]
SDRAM Banks Per Bank Group [Auto]
SDRAM Bank Groups [Auto]
Dynamic Memory Boost [Disabled]
Realtime Memory Frequency [Disabled]
SA GV [Disabled]
Voltage Monitor [Die Sense]
VRM Initialization Check [Enabled]
CPU Input Voltage Load-line Calibration [Level 3]
CPU Load-line Calibration [Level 5]
Synch ACDC Loadline with VRM Loadline [Disabled]
CPU Current Capability [140%]
CPU Current Reporting [100%]
Core Voltage Suspension [Auto]
CPU VRM Switching Frequency [Manual]
Fixed CPU VRM Switching Frequency(KHz) [500]
CPU Power Duty Control [Extreme]
CPU Power Phase Control [Extreme]
CPU Power Thermal Control [125]
CPU Core/Cache Boot Voltage [Auto]
CPU Input Boot Voltage [Auto]
PLL Termination Boot Voltage [Auto]
CPU Standby Boot Voltage [Auto]
Memory Controller Boot Voltage [Auto]
CPU Core Auto Voltage Cap [Auto]
CPU Input Auto Voltage Cap [Auto]
Memory Controller Auto Voltage Cap [Auto]
Maximum CPU Core Temperature [Auto]
Fast Throttle Threshold [Auto]
Package Temperature Threshold [Auto]
Regulate Frequency by above Threshold [Auto]
IVR Transmitter VDDQ ICCMAX [15]
Unlimited ICCMAX [Disabled]
CPU Core/Cache Current Limit Max. [400.00]
Long Duration Package Power Limit [253]
Package Power Time Window [Auto]
Short Duration Package Power Limit [320]
Dual Tau Boost [Disabled]
IA AC Load Line [Auto]
IA DC Load Line [Auto]
IA CEP [Disabled]
SA CEP [Disabled]
IA SoC Iccmax Reactive Protector [Auto]
Inverse Temperature Dependency Throttle [Auto]
IA VR Voltage Limit [1550]
CPU SVID Support [Auto]
Cache Dynamic OC Switcher [Auto]
TVB Voltage Optimizations [Auto]
Enhanced TVB [Auto]
Overclocking TVB [Auto]
Overclocking TVB Global Temperature Offset Sign [+]
Overclocking TVB Global Temperature Offset Value [Auto]
Offset Mode Sign 1 [+]
V/F Point 1 Offset [Auto]
Offset Mode Sign 2 [+]
V/F Point 2 Offset [Auto]
Offset Mode Sign 3 [+]
V/F Point 3 Offset [Auto]
Offset Mode Sign 4 [+]
V/F Point 4 Offset [Auto]
Offset Mode Sign 5 [+]
V/F Point 5 Offset [Auto]
Offset Mode Sign 6 [+]
V/F Point 6 Offset [Auto]
Offset Mode Sign 7 [+]
V/F Point 7 Offset [Auto]
Offset Mode Sign 8 [+]
V/F Point 8 Offset [Auto]
Offset Mode Sign 9 [+]
V/F Point 9 Offset [Auto]
Offset Mode Sign 10 [+]
V/F Point 10 Offset [Auto]
Offset Mode Sign 11 [+]
V/F Point 11 Offset [Auto]
Initial BCLK Frequency [100.0000]
Runtime BCLK OC [Disabled]
BCLK Amplitude [900mV]
BCLK Slew Rate [Fast]
BCLK Spread Spectrum [Disabled]
Initial PCIE Frequency [Auto]
PCIE/DMI Amplitude [900mV]
PCIE/DMI Slew Rate [Fast]
PCIE/DMI Spread Spectrum [Disabled]
Cold Boot PCIE Frequency [Auto]
Realtime Memory Timing [Enabled]
SPD Write Disable [TRUE]
PVD Ratio Threshold [Auto]
SA PLL Frequency Override [Auto]
BCLK TSC HW Fixup [Enabled]
Core Ratio Extension Mode [Disabled]
FLL OC mode [Auto]
UnderVolt Protection [Disabled]
Switch Microcode [Current Microcode]
Xtreme Tweaking [Disabled]
Core PLL Voltage [Auto]
GT PLL Voltage [Auto]
Ring PLL Voltage [Auto]
System Agent PLL Voltage [Auto]
Memory Controller PLL Voltage [Auto]
Efficient-core PLL Voltage [Auto]
CPU 1.8V Small Rail [Auto]
PLL Termination Voltage [Auto]
CPU Standby Voltage [Auto]
PCH 1.05V Voltage [Auto]
PCH 0.82V Voltage [Auto]
CPU Input Voltage Reset Voltage [Auto]
Eventual CPU Input Voltage [Auto]
Eventual Memory Controller Voltage [Auto]
Package Temperature Threshold [Auto]
Regulate Frequency by above Threshold [Auto]
Cooler Efficiency Customize [Keep Training]
Cooler Re-evaluation Algorithm [Normal]
Optimism Scale [100]
Ring Down Bin [Auto]
Min. CPU Cache Ratio [44]
Max. CPU Cache Ratio [44]
BCLK Aware Adaptive Voltage [Auto]
Actual VRM Core Voltage [Auto]
Global Core SVID Voltage [Adaptive Mode]
- Offset Mode Sign [-]
- Additional Turbo Mode CPU Core Voltage [Auto]
- Offset Voltage [0.04000]
Cache SVID Voltage [Auto]
CPU L2 Voltage [Auto]
CPU System Agent Voltage [Manual Mode]
- CPU System Agent Voltage Override [1.20000]
CPU Input Voltage [Auto]
High DRAM Voltage Mode [Enabled]
DRAM VDD Voltage [1.45000]
DRAM VDDQ Voltage [1.40000]
IVR Transmitter VDDQ Voltage [1.30000]
Memory Controller Voltage [1.40000]
MC Voltage Calculation Voltage Base [Auto]
VDD Calculation Voltage Base [Auto]
PMIC Voltages [Sync All PMICs]
SPD HUB VLDO (1.8V) [Auto]
SPD HUB VDDIO (1.0V) [Auto]
DRAM VDD Voltage [1.45000]
DRAM VDDQ Voltage [1.40000]
DRAM VPP Voltage [1.80000]
DRAM VDD Switching Frequency [Auto]
DRAM VDDQ Switching Frequency [Auto]
DRAM VPP Switching Frequency [Auto]
DRAM Current Capability [Auto]
PCI Express Native Power Management [Disabled]
DMI Link ASPM Control [Disabled]
ASPM [Disabled]
L1 Substates [Disabled]
DMI ASPM [Disabled]
DMI Gen3 ASPM [Disabled]
PEG - ASPM [Disabled]
PCI Express Clock Gating [Enabled]
Hardware Prefetcher [Enabled]
Adjacent Cache Line Prefetch [Disabled]
Intel (VMX) Virtualization Technology [Disabled]
Per P-Core Control [Disabled]
Per E-Core Control [Disabled]
Active Performance Cores [All]
Active Efficient Cores [All]
Hyper-Threading [Disabled]
Total Memory Encryption [Disabled]
Legacy Game Compatibility Mode [Disabled]
Boot performance mode [Auto]
Intel(R) SpeedStep(tm) [Disabled]
Intel(R) Speed Shift Technology [Disabled]
Turbo Mode [Enabled]
Acoustic Noise Mitigation [Disabled]
CPU C-states [Enabled]
Enhanced C-states [Enabled]
Package C State Limit [C8]
Thermal Monitor [Enabled]
Dual Tau Boost [Disabled]
VT-d [Disabled]
Memory Remap [Enabled]
Enable VMD controller [Enabled]
Map PCIe Storage under VMD [Disabled]
Map SATA Controller under VMD [Disabled]
M.2_2 Link Speed [Auto]
PCIEX16(G5)_1 Link Speed [Auto]
M.2_1 Link Speed [Auto]
PCIEX4(G4)_1 Link Speed [Auto]
PCIEX4(G4)_2 Link Speed [Auto]
M.2_3 Link Speed [Auto]
DIMM.2_1 Link Speed [Auto]
DIMM.2_2 Link Speed [Auto]
SATA Controller(s) [Enabled]
Aggressive LPM Support [Disabled]
SMART Self Test [Enabled]
M.2_3 [Enabled]
M.2_3 Hot Plug [Disabled]
SATA6G_1 [Enabled]
SATA6G_1 Hot Plug [Disabled]
SATA6G_2 [Enabled]
SATA6G_2 Hot Plug [Disabled]
SATA6G_3 [Enabled]
SATA6G_3 Hot Plug [Disabled]
SATA6G_4 [Enabled]
SATA6G_4 Hot Plug [Disabled]
PTT [Enable]
Intel(R) Dynamic Tuning Technology [Disabled]
PCIE Tunneling over USB4 [Enabled]
Discrete Thunderbolt(TM) Support [Disabled]
Security Device Support [Enable]
SHA256 PCR Bank [Enabled]
Pending operation [None]
Platform Hierarchy [Enabled]
Storage Hierarchy [Enabled]
Endorsement Hierarchy [Enabled]
Physical Presence Spec Version [1.3]
USB Host Controller Support [Disabled]
Password protection of Runtime Variables [Enable]
Above 4G Decoding [Enabled]
Resize BAR Support [Enabled]
SR-IOV Support [Disabled]
Legacy USB Support [Enabled]
XHCI Hand-off [Enabled]
JetFlashTranscend 8GB 1.00 [Auto]
U10G_1 [Enabled]
U5G_E5 [Enabled]
U5G_E6 [Enabled]
U5G_E7 [Enabled]
U5G_E8 [Enabled]
U20G_C3 [Enabled]
U10G_5 [Enabled]
U10G_6 [Enabled]
U10G_7 [Enabled]
U10G_8 [Enabled]
U20G_C9 [Enabled]
USB11 [Enabled]
USB12 [Enabled]
U32G1_E1 [Enabled]
U32G1_E2 [Enabled]
U32G1_E3 [Enabled]
U32G1_E4 [Enabled]
Network Stack [Disabled]
Device [WDC WD30EFRX-68AX9N0]
Restore AC Power Loss [Power Off]
Max Power Saving [Disabled]
ErP Ready [Disabled]
Power On By PCI-E [Disabled]
Power On By RTC [Disabled]
PCIe Bandwidth Bifurcation Configuration [Auto]
USB Audio [Enabled]
Intel LAN [Enabled]
USB power delivery in Soft Off state (S5) [Disabled]
Wi-Fi Controller [Disabled]
Bluetooth Controller [Disabled]
When system is in working state [All On]
Q-Code LED Function [Auto]
When system is in sleep, hibernate or soft off states [Stealth Mode]
M.2_3 Configuration [Auto]
CPU PCIE Configuration Mode [Auto]
ASMedia USB 3.2 Controller_U5G_E12 [Enabled]
ASMedia USB 3.2 Controller_U5G_E34 [Enabled]
GNA Device [Disabled]
Alteration Mode Switch [PCIE Link Speed]
CPU Temperature [Monitor]
CPU Package Temperature [Monitor]
MotherBoard Temperature [Monitor]
VRM Temperature [Monitor]
Chipset Temperature [Monitor]
T_Sensor Temperature [Monitor]
DIMM.2 Sensor 1 Temperature [Monitor]
DIMM.2 Sensor 2 Temperature [Monitor]
Water In T Sensor Temperature [Monitor]
Water Out T Sensor Temperature [Monitor]
DIMM Thermistor Temperature [Monitor]
DIMM A1 Temperature [Monitor]
DIMM B1 Temperature [Monitor]
CPU Fan Speed [Monitor]
CPU Optional Fan Speed [Monitor]
Chassis Fan 1 Speed [Monitor]
Chassis Fan 2 Speed [Monitor]
Extra Flow Fan Speed [Monitor]
Water Pump+ Speed [Monitor]
AIO Pump Speed [Monitor]
Flow Rate [Monitor]
CPU Core Voltage [Monitor]
12V Voltage [Monitor]
5V Voltage [Monitor]
3.3V Voltage [Monitor]
Memory Controller Voltage [Monitor]
CPU Fan Q-Fan Control [PWM Mode]
CPU Fan Profile [Manual]
CPU Fan Q-Fan Source [CPU]
CPU Fan Step Up [Level 0]
CPU Fan Step Down [Level 0]
CPU Fan Speed Low Limit [200 RPM]
CPU Fan Point4 Temperature [70]
CPU Fan Point4 Duty Cycle (%) [50]
CPU Fan Point3 Temperature [65]
CPU Fan Point3 Duty Cycle (%) [50]
CPU Fan Point2 Temperature [45]
CPU Fan Point2 Duty Cycle (%) [50]
CPU Fan Point1 Temperature [20]
CPU Fan Point1 Duty Cycle (%) [50]
Chassis Fan 1 Q-Fan Control [Auto Detect]
Chassis Fan 1 Profile [Standard]
Chassis Fan 1 Q-Fan Source [CPU]
Chassis Fan 1 Step Up [Level 0]
Chassis Fan 1 Step Down [Level 0]
Chassis Fan 1 Speed Low Limit [200 RPM]
Chassis Fan 2 Q-Fan Control [PWM Mode]
Chassis Fan 2 Profile [Manual]
Chassis Fan 2 Q-Fan Source [CPU]
Chassis Fan 2 Step Up [Level 0]
Chassis Fan 2 Step Down [Level 0]
Chassis Fan 2 Speed Low Limit [200 RPM]
Chassis Fan 2 Point4 Temperature [70]
Chassis Fan 2 Point4 Duty Cycle (%) [42]
Chassis Fan 2 Point3 Temperature [65]
Chassis Fan 2 Point3 Duty Cycle (%) [42]
Chassis Fan 2 Point2 Temperature [45]
Chassis Fan 2 Point2 Duty Cycle (%) [42]
Chassis Fan 2 Point1 Temperature [20]
Chassis Fan 2 Point1 Duty Cycle (%) [42]
Extra Flow Fan Q-Fan Control [Auto Detect]
Extra Flow Fan Profile [Standard]
Extra Flow Fan Q-Fan Source [DIMM Thermistor]
Extra Flow Fan Step Up [Level 0]
Extra Flow Fan Step Down [Level 0]
Extra Flow Fan Speed Low Limit [Ignore]
Water Pump+ Q-Fan Control [Auto Detect]
Water Pump+ Profile [Full Speed]
AIO Pump Q-Fan Control [Auto Detect]
AIO Pump Profile [Full Speed]
CPU Temperature LED Switch [Enabled]
Launch CSM [Disabled]
OS Type [Windows UEFI mode]
Secure Boot Mode [Standard]
Fast Boot [Disabled]
Boot Logo Display [Auto]
POST Delay Time [3 sec]
Bootup NumLock State [On]
Wait For 'F1' If Error [Enabled]
Option ROM Messages [Force BIOS]
Interrupt 19 Capture [Disabled]
AMI Native NVMe Driver Support [Enabled]
Setup Mode [Advanced Mode]
Boot Sector (MBR/GPT) Recovery Policy [Local User Control]
Next Boot Recovery Action [Skip]
BIOS Image Rollback Support [Enabled]
Publish HII Resources [Disabled]
Flexkey [Reset]
Setup Animator [Disabled]
Load from Profile [2]
Profile Name [7800]
Save to Profile [3]
DIMM Slot Number [DIMM_A1]
Hotkey F3 [Toggle ASUS EZ Flash 3]
Hotkey F4 [Boot from UEFI USB]
Download & Install ARMOURY CRATE app [Disabled]
Download & Install MyASUS service & app [Disabled]

Never saw it dropping that huge. Even on very unstable environment it stays around the set value.
Look at his two per channel test above, both stays around 1.32V.

I think it only drops while at idle. Dont know if it should do that or not though.

 

[tibcsi0407]

It can pass everything and CB15 Extreme no issues. I feed it with 1.1208-1.137v under load just for VST/VT3 while it only needs like 1.09-1.1v for 56/44/44

Spoiler: Bios.txt

[2024/05/28 14:13:51]
Ai Overclock Tuner [XMP II]
XMP [DDR5-7200 34-42-42-84-2N-1.40V-1.40V]
BCLK Frequency [100.0000]
PCIE Frequency [100.0000]
Intel(R) Adaptive Boost Technology [Auto]
ASUS MultiCore Enhancement [Auto – Lets BIOS Optimize]
SVID Behavior [Auto]
BCLK Frequency : DRAM Frequency Ratio [Auto]
Memory Controller : DRAM Frequency Ratio [Auto]
DRAM Frequency [DDR5-8000MHz]
DIMM Flex [Disabled]
Performance Core Ratio [Sync All Cores]
ALL-Core Ratio Limit [56]
Performance Core0 Specific Ratio Limit [Auto]
Performance Core0 specific Voltage [Auto]
Performance Core1 Specific Ratio Limit [Auto]
Performance Core1 specific Voltage [Auto]
Performance Core2 Specific Ratio Limit [Auto]
Performance Core2 specific Voltage [Auto]
Performance Core3 Specific Ratio Limit [Auto]
Performance Core3 specific Voltage [Auto]
*Performance Core4 Specific Ratio Limit [Auto]
Performance Core4 specific Voltage [Auto]
*Performance Core5 Specific Ratio Limit [Auto]
Performance Core5 specific Voltage [Auto]
Performance Core6 Specific Ratio Limit [Auto]
Performance Core6 specific Voltage [Auto]
Performance Core7 Specific Ratio Limit [Auto]
Performance Core7 specific Voltage [Auto]
Efficient Core Ratio [Sync All Cores]
ALL-Core Ratio Limit [44]
Efficient Core Group0 Specific Ratio Limit [Auto]
Efficient Core Group0 specific Voltage [Auto]
Efficient Core Group1 Specific Ratio Limit [Auto]
Efficient Core Group1 specific Voltage [Auto]
Efficient Core Group2 Specific Ratio Limit [Auto]
Efficient Core Group2 specific Voltage [Auto]
Efficient Core Group3 Specific Ratio Limit [Auto]
Efficient Core Group3 specific Voltage [Auto]
AVX2 [Auto]
AVX2 Ratio Offset to per-core Ratio Limit [Auto]
AVX2 Voltage Guardband Scale Factor [Auto]
Maximus Tweak [Mode 2]
DRAM CAS# Latency [36]
DRAM RAS# to CAS# Delay Read [48]
DRAM RAS# to CAS# Delay Write [48]
DRAM RAS# PRE Time [48]
DRAM RAS# ACT Time [60]
DRAM Command Rate [2N]
DRAM RAS# to RAS# Delay L [10]
DRAM RAS# to RAS# Delay S [8]
DRAM REF Cycle Time 2 [512]
DRAM REF Cycle Time Same Bank [416]
DRAM Refresh Interval [65535]
DRAM WRITE Recovery Time [Auto]
DRAM READ to PRE Time [12]
DRAM FOUR ACT WIN Time [32]
DRAM WRITE to READ Delay L [Auto]
DRAM WRITE to READ Delay S [Auto]
DRAM CKE Minimum Pulse Width [20]
DRAM Write Latency [34]
Ctl0 dqvrefup [Auto]
Ctl0 dqvrefdn [Auto]
Ctl0 dqodtvrefup [Auto]
Ctl0 dqodtvrefdn [Auto]
Ctl1 cmdvrefup [Auto]
Ctl1 ctlvrefup [Auto]
Ctl1 clkvrefup [Auto]
Ctl1 ckecsvrefup [Auto]
Ctl2 cmdvrefdn [Auto]
Ctl2 ctlvrefdn [Auto]
Ctl2 clkvrefdn [Auto]
Read Equalization RxEq Start Sign [-]
Read Equalization RxEq Start [Auto]
Read Equalization RxEq Stop Sign [-]
Read Equalization RxEq Stop [Auto]
ODT_READ_DURATION [Auto]
ODT_READ_DELAY [Auto]
ODT_WRITE_DURATION [Auto]
ODT_WRITE_DELAY [Auto]
DQ RTT WR [Auto]
DQ RTT NOM RD [Auto]
DQ RTT NOM WR [Auto]
DQ RTT PARK [Auto]
DQ RTT PARK DQS [Auto]
GroupA CA ODT [Auto]
GroupA CS ODT [Auto]
GroupA CK ODT [Auto]
GroupB CA ODT [Auto]
GroupB CS ODT [Auto]
GroupB CK ODT [Auto]
Pull-up Output Driver Impedance [Auto]
Pull-Down Output Driver Impedance [Auto]
DQ RTT WR [Auto]
DQ RTT NOM RD [Auto]
DQ RTT NOM WR [Auto]
DQ RTT PARK [Auto]
DQ RTT PARK DQS [Auto]
GroupA CA ODT [Auto]
GroupA CS ODT [Auto]
GroupA CK ODT [Auto]
GroupB CA ODT [Auto]
GroupB CS ODT [Auto]
GroupB CK ODT [Auto]
Pull-up Output Driver Impedance [Auto]
Pull-Down Output Driver Impedance [Auto]
Round Trip Latency Init Value MC0 CHA [Auto]
Round Trip Latency Max Value MC0 CHA [Auto]
Round Trip Latency Offset Value Mode Sign MC0 CHA [-]
Round Trip Latency Offset Value MC0 CHA [Auto]
Round Trip Latency Init Value MC0 CHB [Auto]
Round Trip Latency Max Value MC0 CHB [Auto]
Round Trip Latency Offset Value Mode Sign MC0 CHB [-]
Round Trip Latency Offset Value MC0 CHB [Auto]
Round Trip Latency Init Value MC1 CHA [Auto]
Round Trip Latency Max Value MC1 CHA [Auto]
Round Trip Latency Offset Value Mode Sign MC1 CHA [-]
Round Trip Latency Offset Value MC1 CHA [Auto]
Round Trip Latency Init Value MC1 CHB [Auto]
Round Trip Latency Max Value MC1 CHB [Auto]
Round Trip Latency Offset Value Mode Sign MC1 CHB [-]
Round Trip Latency Offset Value MC1 CHB [Auto]
Round Trip Latency MC0 CHA R0 [Auto]
Round Trip Latency MC0 CHA R1 [Auto]
Round Trip Latency MC0 CHA R2 [0]
Round Trip Latency MC0 CHA R3 [0]
Round Trip Latency MC0 CHA R4 [0]
Round Trip Latency MC0 CHA R5 [0]
Round Trip Latency MC0 CHA R6 [0]
Round Trip Latency MC0 CHA R7 [0]
Round Trip Latency MC0 CHB R0 [Auto]
Round Trip Latency MC0 CHB R1 [Auto]
Round Trip Latency MC0 CHB R2 [0]
Round Trip Latency MC0 CHB R3 [0]
Round Trip Latency MC0 CHB R4 [0]
Round Trip Latency MC0 CHB R5 [0]
Round Trip Latency MC0 CHB R6 [0]
Round Trip Latency MC0 CHB R7 [0]
Round Trip Latency MC1 CHA R0 [Auto]
Round Trip Latency MC1 CHA R1 [Auto]
Round Trip Latency MC1 CHA R2 [0]
Round Trip Latency MC1 CHA R3 [0]
Round Trip Latency MC1 CHA R4 [0]
Round Trip Latency MC1 CHA R5 [0]
Round Trip Latency MC1 CHA R6 [0]
Round Trip Latency MC1 CHA R7 [0]
Round Trip Latency MC1 CHB R0 [Auto]
Round Trip Latency MC1 CHB R1 [Auto]
Round Trip Latency MC1 CHB R2 [0]
Round Trip Latency MC1 CHB R3 [0]
Round Trip Latency MC1 CHB R4 [0]
Round Trip Latency MC1 CHB R5 [0]
Round Trip Latency MC1 CHB R6 [0]
Round Trip Latency MC1 CHB R7 [0]
Early Command Training [Auto]
SenseAmp Offset Training [Auto]
Early ReadMPR Timing Centering 2D [Auto]
Read MPR Training [Auto]
Receive Enable Training [Auto]
Jedec Write Leveling [Auto]
Early Write Time Centering 2D [Auto]
Early Read Time Centering 2D [Auto]
Write Timing Centering 1D [Auto]
Write Voltage Centering 1D [Auto]
Read Timing Centering 1D [Auto]
Read Timing Centering with JR [Auto]
Dimm ODT Training* [Auto]
Max RTT_WR [ODT Off]
DIMM RON Training* [Auto]
Write Drive Strength/Equalization 2D* [Auto]
Write Slew Rate Training* [Auto]
Read ODT Training* [Auto]
Comp Optimization Training [Auto]
Read Equalization Training* [Auto]
Read Amplifier Training* [Auto]
Write Timing Centering 2D [Auto]
Read Timing Centering 2D [Auto]
Command Voltage Centering [Auto]
Early Command Voltage Centering [Auto]
Write Voltage Centering 2D [Auto]
Read Voltage Centering 2D [Auto]
Late Command Training [Auto]
Round Trip Latency [Auto]
Turn Around Timing Training [Auto]
CMD CTL CLK Slew Rate [Auto]
CMD/CTL DS & E 2D [Auto]
Read Voltage Centering 1D [Auto]
TxDqTCO Comp Training* [Auto]
ClkTCO Comp Training* [Auto]
TxDqsTCO Comp Training* [Auto]
VccDLL Bypass Training [Auto]
CMD/CTL Drive Strength Up/Dn 2D [Auto]
DIMM CA ODT Training [Auto]
PanicVttDnLp Training* [Auto]
Read Vref Decap Training* [Auto]
Vddq Training [Disabled]
Duty Cycle Correction Training [Auto]
Periodic DCC [Auto]
Rank Margin Tool Per Bit [Auto]
DIMM DFE Training [Auto]
EARLY DIMM DFE Training [Auto]
Tx Dqs Dcc Training [Auto]
DRAM DCA Training [Auto]
Write Driver Strength Training [Auto]
Rank Margin Tool [Auto]
Memory Test [Auto]
DIMM SPD Alias Test [Auto]
Receive Enable Centering 1D [Auto]
Retrain Margin Check [Auto]
Write Drive Strength Up/Dn independently [Auto]
LPDDR DqDqs Re-Training [Auto]
Margin Check Limit [Disabled]
tRDRD_sg_Training [Auto]
tRDRD_sg_Runtime [16]
tRDRD_dg_Training [Auto]
tRDRD_dg_Runtime [8]
tRDWR_sg [20]
tRDWR_dg [20]
tWRWR_sg [16]
tWRWR_dg [8]
tWRRD_sg [64]
tWRRD_dg [54]
tRDRD_dr [0]
tRDRD_dd [0]
tRDWR_dr [0]
tRDWR_dd [0]
tWRWR_dr [0]
tWRWR_dd [0]
tWRRD_dr [0]
tWRRD_dd [0]
tRPRE [Auto]
tWPRE [Auto]
tWPOST [Auto]
tWRPRE [65]
tPRPDEN [2]
tRDPDEN [45]
tWRPDEN [66]
tCPDED [20]
tREFIX9 [Auto]
Ref Interval [Auto]
tXPDLL [Auto]
tXP [30]
tPPD [2]
tCCD_L_tDLLK [Auto]
tZQCAL [Auto]
tZQCS [Auto]
OREF_RI [Auto]
Refresh Watermarks [High]
Refresh Hp Wm [Auto]
Refresh Panic Wm [Auto]
Refresh Abr Release [Auto]
tXSDLL [Auto]
tZQOPER [Auto]
tMOD [Auto]
CounttREFIWhileRefEn [Auto]
HPRefOnMRS [Auto]
SRX Ref Debits [Auto]
RAISE BLK WAIT [Auto]
Ref Stagger En [Auto]
Ref Stagger Mode [Auto]
Disable Stolen Refresh [Auto]
En Ref Type Display [Auto]
Trefipulse Stagger Disable [Auto]
tRPab ext [Auto]
derating ext [Auto]
Allow 2cyc B2B LPDDR [Auto]
tCSH [Auto]
tCSL [Auto]
powerdown Enable [Auto]
idle length [Auto]
raise cke after exit latency [Auto]
powerdown latency [Auto]
powerdown length [Auto]
selfrefresh latency [Auto]
selfrefresh length [Auto]
ckevalid length [Auto]
ckevalid enable [Auto]
idle enable [Auto]
selfrefresh enable [Auto]
Address mirror [Auto]
no gear4 param divide [Auto]
x8 device [Auto]
no gear2 param divide [Auto]
ddr 1dpc split ranks on subch [Auto]
write0 enable [Auto]
MultiCycCmd [Auto]
WCKDiffLowInIdle [Auto]
PBR Disable [Auto]
PBR OOO Dis [Auto]
PBR Disable on hot [Auto]
PBR Exit on Idle Cnt [Auto]
tXSR [519]
Dec tCWL [Auto]
Add tCWL [Auto]
Add 1Qclk delay [Auto]
MRC Fast Boot [Disabled]
MCH Full Check [Auto]
Mem Over Clock Fail Count [1]
Training Profile [Standard Profile]
RxDfe [Auto]
Mrc Training Loop Count [Auto]
DRAM CLK Period [Auto]
Dll_bwsel [Auto]
Controller 0, Channel 0 Control [Enabled]
Controller 0, Channel 1 Control [Enabled]
Controller 1, Channel 0 Control [Enabled]
Controller 1, Channel 1 Control [Enabled]
MC_Vref0 [Auto]
MC_Vref1 [Auto]
MC_Vref2 [Auto]
Fine Granularity Refresh mode [Auto]
SDRAM Density Per Die [Auto]
SDRAM Banks Per Bank Group [Auto]
SDRAM Bank Groups [Auto]
Dynamic Memory Boost [Disabled]
Realtime Memory Frequency [Disabled]
SA GV [Disabled]
Voltage Monitor [Die Sense]
VRM Initialization Check [Enabled]
CPU Input Voltage Load-line Calibration [Level 3]
CPU Load-line Calibration [Level 5]
Synch ACDC Loadline with VRM Loadline [Disabled]
CPU Current Capability [140%]
CPU Current Reporting [100%]
Core Voltage Suspension [Auto]
CPU VRM Switching Frequency [Manual]
Fixed CPU VRM Switching Frequency(KHz) [500]
CPU Power Duty Control [Extreme]
CPU Power Phase Control [Extreme]
CPU Power Thermal Control [125]
CPU Core/Cache Boot Voltage [Auto]
CPU Input Boot Voltage [Auto]
PLL Termination Boot Voltage [Auto]
CPU Standby Boot Voltage [Auto]
Memory Controller Boot Voltage [Auto]
CPU Core Auto Voltage Cap [Auto]
CPU Input Auto Voltage Cap [Auto]
Memory Controller Auto Voltage Cap [Auto]
Maximum CPU Core Temperature [Auto]
Fast Throttle Threshold [Auto]
Package Temperature Threshold [Auto]
Regulate Frequency by above Threshold [Auto]
IVR Transmitter VDDQ ICCMAX [15]
Unlimited ICCMAX [Disabled]
CPU Core/Cache Current Limit Max. [400.00]
Long Duration Package Power Limit [253]
Package Power Time Window [Auto]
Short Duration Package Power Limit [320]
Dual Tau Boost [Disabled]
IA AC Load Line [Auto]
IA DC Load Line [Auto]
IA CEP [Disabled]
SA CEP [Disabled]
IA SoC Iccmax Reactive Protector [Auto]
Inverse Temperature Dependency Throttle [Auto]
IA VR Voltage Limit [1550]
CPU SVID Support [Auto]
Cache Dynamic OC Switcher [Auto]
TVB Voltage Optimizations [Auto]
Enhanced TVB [Auto]
Overclocking TVB [Auto]
Overclocking TVB Global Temperature Offset Sign [+]
Overclocking TVB Global Temperature Offset Value [Auto]
Offset Mode Sign 1 [+]
V/F Point 1 Offset [Auto]
Offset Mode Sign 2 [+]
V/F Point 2 Offset [Auto]
Offset Mode Sign 3 [+]
V/F Point 3 Offset [Auto]
Offset Mode Sign 4 [+]
V/F Point 4 Offset [Auto]
Offset Mode Sign 5 [+]
V/F Point 5 Offset [Auto]
Offset Mode Sign 6 [+]
V/F Point 6 Offset [Auto]
Offset Mode Sign 7 [+]
V/F Point 7 Offset [Auto]
Offset Mode Sign 8 [+]
V/F Point 8 Offset [Auto]
Offset Mode Sign 9 [+]
V/F Point 9 Offset [Auto]
Offset Mode Sign 10 [+]
V/F Point 10 Offset [Auto]
Offset Mode Sign 11 [+]
V/F Point 11 Offset [Auto]
Initial BCLK Frequency [100.0000]
Runtime BCLK OC [Disabled]
BCLK Amplitude [900mV]
BCLK Slew Rate [Fast]
BCLK Spread Spectrum [Disabled]
Initial PCIE Frequency [Auto]
PCIE/DMI Amplitude [900mV]
PCIE/DMI Slew Rate [Fast]
PCIE/DMI Spread Spectrum [Disabled]
Cold Boot PCIE Frequency [Auto]
Realtime Memory Timing [Enabled]
SPD Write Disable [TRUE]
PVD Ratio Threshold [Auto]
SA PLL Frequency Override [Auto]
BCLK TSC HW Fixup [Enabled]
Core Ratio Extension Mode [Disabled]
FLL OC mode [Auto]
UnderVolt Protection [Disabled]
Switch Microcode [Current Microcode]
Xtreme Tweaking [Disabled]
Core PLL Voltage [Auto]
GT PLL Voltage [Auto]
Ring PLL Voltage [Auto]
System Agent PLL Voltage [Auto]
Memory Controller PLL Voltage [Auto]
Efficient-core PLL Voltage [Auto]
CPU 1.8V Small Rail [Auto]
PLL Termination Voltage [Auto]
CPU Standby Voltage [Auto]
PCH 1.05V Voltage [Auto]
PCH 0.82V Voltage [Auto]
CPU Input Voltage Reset Voltage [Auto]
Eventual CPU Input Voltage [Auto]
Eventual Memory Controller Voltage [Auto]
Package Temperature Threshold [Auto]
Regulate Frequency by above Threshold [Auto]
Cooler Efficiency Customize [Keep Training]
Cooler Re-evaluation Algorithm [Normal]
Optimism Scale [100]
Ring Down Bin [Auto]
Min. CPU Cache Ratio [44]
Max. CPU Cache Ratio [44]
BCLK Aware Adaptive Voltage [Auto]
Actual VRM Core Voltage [Auto]
Global Core SVID Voltage [Adaptive Mode]
- Offset Mode Sign [-]
- Additional Turbo Mode CPU Core Voltage [Auto]
- Offset Voltage [0.04000]
Cache SVID Voltage [Auto]
CPU L2 Voltage [Auto]
CPU System Agent Voltage [Manual Mode]
- CPU System Agent Voltage Override [1.20000]
CPU Input Voltage [Auto]
High DRAM Voltage Mode [Enabled]
DRAM VDD Voltage [1.45000]
DRAM VDDQ Voltage [1.40000]
IVR Transmitter VDDQ Voltage [1.30000]
Memory Controller Voltage [1.40000]
MC Voltage Calculation Voltage Base [Auto]
VDD Calculation Voltage Base [Auto]
PMIC Voltages [Sync All PMICs]
SPD HUB VLDO (1.8V) [Auto]
SPD HUB VDDIO (1.0V) [Auto]
DRAM VDD Voltage [1.45000]
DRAM VDDQ Voltage [1.40000]
DRAM VPP Voltage [1.80000]
DRAM VDD Switching Frequency [Auto]
DRAM VDDQ Switching Frequency [Auto]
DRAM VPP Switching Frequency [Auto]
DRAM Current Capability [Auto]
PCI Express Native Power Management [Disabled]
DMI Link ASPM Control [Disabled]
ASPM [Disabled]
L1 Substates [Disabled]
DMI ASPM [Disabled]
DMI Gen3 ASPM [Disabled]
PEG - ASPM [Disabled]
PCI Express Clock Gating [Enabled]
Hardware Prefetcher [Enabled]
Adjacent Cache Line Prefetch [Disabled]
Intel (VMX) Virtualization Technology [Disabled]
Per P-Core Control [Disabled]
Per E-Core Control [Disabled]
Active Performance Cores [All]
Active Efficient Cores [All]
Hyper-Threading [Disabled]
Total Memory Encryption [Disabled]
Legacy Game Compatibility Mode [Disabled]
Boot performance mode [Auto]
Intel(R) SpeedStep(tm) [Disabled]
Intel(R) Speed Shift Technology [Disabled]
Turbo Mode [Enabled]
Acoustic Noise Mitigation [Disabled]
CPU C-states [Enabled]
Enhanced C-states [Enabled]
Package C State Limit [C8]
Thermal Monitor [Enabled]
Dual Tau Boost [Disabled]
VT-d [Disabled]
Memory Remap [Enabled]
Enable VMD controller [Enabled]
Map PCIe Storage under VMD [Disabled]
Map SATA Controller under VMD [Disabled]
M.2_2 Link Speed [Auto]
PCIEX16(G5)_1 Link Speed [Auto]
M.2_1 Link Speed [Auto]
PCIEX4(G4)_1 Link Speed [Auto]
PCIEX4(G4)_2 Link Speed [Auto]
M.2_3 Link Speed [Auto]
DIMM.2_1 Link Speed [Auto]
DIMM.2_2 Link Speed [Auto]
SATA Controller(s) [Enabled]
Aggressive LPM Support [Disabled]
SMART Self Test [Enabled]
M.2_3 [Enabled]
M.2_3 Hot Plug [Disabled]
SATA6G_1 [Enabled]
SATA6G_1 Hot Plug [Disabled]
SATA6G_2 [Enabled]
SATA6G_2 Hot Plug [Disabled]
SATA6G_3 [Enabled]
SATA6G_3 Hot Plug [Disabled]
SATA6G_4 [Enabled]
SATA6G_4 Hot Plug [Disabled]
PTT [Enable]
Intel(R) Dynamic Tuning Technology [Disabled]
PCIE Tunneling over USB4 [Enabled]
Discrete Thunderbolt(TM) Support [Disabled]
Security Device Support [Enable]
SHA256 PCR Bank [Enabled]
Pending operation [None]
Platform Hierarchy [Enabled]
Storage Hierarchy [Enabled]
Endorsement Hierarchy [Enabled]
Physical Presence Spec Version [1.3]
USB Host Controller Support [Disabled]
Password protection of Runtime Variables [Enable]
Above 4G Decoding [Enabled]
Resize BAR Support [Enabled]
SR-IOV Support [Disabled]
Legacy USB Support [Enabled]
XHCI Hand-off [Enabled]
JetFlashTranscend 8GB 1.00 [Auto]
U10G_1 [Enabled]
U5G_E5 [Enabled]
U5G_E6 [Enabled]
U5G_E7 [Enabled]
U5G_E8 [Enabled]
U20G_C3 [Enabled]
U10G_5 [Enabled]
U10G_6 [Enabled]
U10G_7 [Enabled]
U10G_8 [Enabled]
U20G_C9 [Enabled]
USB11 [Enabled]
USB12 [Enabled]
U32G1_E1 [Enabled]
U32G1_E2 [Enabled]
U32G1_E3 [Enabled]
U32G1_E4 [Enabled]
Network Stack [Disabled]
Device [WDC WD30EFRX-68AX9N0]
Restore AC Power Loss [Power Off]
Max Power Saving [Disabled]
ErP Ready [Disabled]
Power On By PCI-E [Disabled]
Power On By RTC [Disabled]
PCIe Bandwidth Bifurcation Configuration [Auto]
USB Audio [Enabled]
Intel LAN [Enabled]
USB power delivery in Soft Off state (S5) [Disabled]
Wi-Fi Controller [Disabled]
Bluetooth Controller [Disabled]
When system is in working state [All On]
Q-Code LED Function [Auto]
When system is in sleep, hibernate or soft off states [Stealth Mode]
M.2_3 Configuration [Auto]
CPU PCIE Configuration Mode [Auto]
ASMedia USB 3.2 Controller_U5G_E12 [Enabled]
ASMedia USB 3.2 Controller_U5G_E34 [Enabled]
GNA Device [Disabled]
Alteration Mode Switch [PCIE Link Speed]
CPU Temperature [Monitor]
CPU Package Temperature [Monitor]
MotherBoard Temperature [Monitor]
VRM Temperature [Monitor]
Chipset Temperature [Monitor]
T_Sensor Temperature [Monitor]
DIMM.2 Sensor 1 Temperature [Monitor]
DIMM.2 Sensor 2 Temperature [Monitor]
Water In T Sensor Temperature [Monitor]
Water Out T Sensor Temperature [Monitor]
DIMM Thermistor Temperature [Monitor]
DIMM A1 Temperature [Monitor]
DIMM B1 Temperature [Monitor]
CPU Fan Speed [Monitor]
CPU Optional Fan Speed [Monitor]
Chassis Fan 1 Speed [Monitor]
Chassis Fan 2 Speed [Monitor]
Extra Flow Fan Speed [Monitor]
Water Pump+ Speed [Monitor]
AIO Pump Speed [Monitor]
Flow Rate [Monitor]
CPU Core Voltage [Monitor]
12V Voltage [Monitor]
5V Voltage [Monitor]
3.3V Voltage [Monitor]
Memory Controller Voltage [Monitor]
CPU Fan Q-Fan Control [PWM Mode]
CPU Fan Profile [Manual]
CPU Fan Q-Fan Source [CPU]
CPU Fan Step Up [Level 0]
CPU Fan Step Down [Level 0]
CPU Fan Speed Low Limit [200 RPM]
CPU Fan Point4 Temperature [70]
CPU Fan Point4 Duty Cycle (%) [50]
CPU Fan Point3 Temperature [65]
CPU Fan Point3 Duty Cycle (%) [50]
CPU Fan Point2 Temperature [45]
CPU Fan Point2 Duty Cycle (%) [50]
CPU Fan Point1 Temperature [20]
CPU Fan Point1 Duty Cycle (%) [50]
Chassis Fan 1 Q-Fan Control [Auto Detect]
Chassis Fan 1 Profile [Standard]
Chassis Fan 1 Q-Fan Source [CPU]
Chassis Fan 1 Step Up [Level 0]
Chassis Fan 1 Step Down [Level 0]
Chassis Fan 1 Speed Low Limit [200 RPM]
Chassis Fan 2 Q-Fan Control [PWM Mode]
Chassis Fan 2 Profile [Manual]
Chassis Fan 2 Q-Fan Source [CPU]
Chassis Fan 2 Step Up [Level 0]
Chassis Fan 2 Step Down [Level 0]
Chassis Fan 2 Speed Low Limit [200 RPM]
Chassis Fan 2 Point4 Temperature [70]
Chassis Fan 2 Point4 Duty Cycle (%) [42]
Chassis Fan 2 Point3 Temperature [65]
Chassis Fan 2 Point3 Duty Cycle (%) [42]
Chassis Fan 2 Point2 Temperature [45]
Chassis Fan 2 Point2 Duty Cycle (%) [42]
Chassis Fan 2 Point1 Temperature [20]
Chassis Fan 2 Point1 Duty Cycle (%) [42]
Extra Flow Fan Q-Fan Control [Auto Detect]
Extra Flow Fan Profile [Standard]
Extra Flow Fan Q-Fan Source [DIMM Thermistor]
Extra Flow Fan Step Up [Level 0]
Extra Flow Fan Step Down [Level 0]
Extra Flow Fan Speed Low Limit [Ignore]
Water Pump+ Q-Fan Control [Auto Detect]
Water Pump+ Profile [Full Speed]
AIO Pump Q-Fan Control [Auto Detect]
AIO Pump Profile [Full Speed]
CPU Temperature LED Switch [Enabled]
Launch CSM [Disabled]
OS Type [Windows UEFI mode]
Secure Boot Mode [Standard]
Fast Boot [Disabled]
Boot Logo Display [Auto]
POST Delay Time [3 sec]
Bootup NumLock State [On]
Wait For 'F1' If Error [Enabled]
Option ROM Messages [Force BIOS]
Interrupt 19 Capture [Disabled]
AMI Native NVMe Driver Support [Enabled]
Setup Mode [Advanced Mode]
Boot Sector (MBR/GPT) Recovery Policy [Local User Control]
Next Boot Recovery Action [Skip]
BIOS Image Rollback Support [Enabled]
Publish HII Resources [Disabled]
Flexkey [Reset]
Setup Animator [Disabled]
Load from Profile [2]
Profile Name [7800]
Save to Profile [3]
DIMM Slot Number [DIMM_A1]
Hotkey F3 [Toggle ASUS EZ Flash 3]
Hotkey F4 [Boot from UEFI USB]
Download & Install ARMOURY CRATE app [Disabled]
Download & Install MyASUS service & app [Disabled]

I think it only drops while at idle. Dont know if it should do that or not though.

Shouldn't drop in idle I believe. For me it doesn't even drop in a 12h workday on the pc.

 

[Darkthrone]

Shouldn't drop in idle I believe. For me it doesn't even drop in a 12h workday on the PC.

Restarted to save the bios for Veii and doesnt seem to have the drop now, weird...