No guarantee
sometimes Slot A causes trouble
sometimes half of dimm causes trouble (MC Link inconsistency)
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sometimes Slot A causes trouble
sometimes half of dimm causes trouble (MC Link inconsistency)
tibcsi0407
Semiprofi
Looks like now I will have problem with Slot B. Could be the RAM iteself too.No guarantee
sometimes Slot A causes trouble
sometimes half of dimm causes trouble (MC Link inconsistency)
I will leave to run it anyway. Also will run Y too to see how the IMC performs on CHB.
Maybe I should inspect the RAM and the thermal pads on the RAM too.
Update, got an error 0 too in the last cycle.
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TM5.Vei, findet sicher noch was.
Karhu macht 500%, dann kommt ein Error.
Aber VDDQ_CPU auf 1415mV.
Maximal 1430mV.
// Benutzte Spannung ist für 16GB
VDDQ Training aus
Cold boot ansonsten stört MRC
VDD2_CPU unklar.
Kommt auf den Chip an.
EDIT:
Ich würde RDWR_DG um 4 weniger (52) rennen. // WTRS 8
Und RDWR_SG um 16 weniger. (68) // WTRL 24
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Ahh good progress
Now we're moving forward.
Can you please isolate me the 2nd channel now
That is testing if complete 2nd channel is messy.
// disable 1+1 & 1+0 links, then swap it to 0+1
You can run just one of both MC links, its ok with your timings.
If both error the same way, its not board design.
Any case we have a path now.
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tibcsi0407
Semiprofi
Thank you. Doing 1+0 now, then 1+1.Ahh good progress
Now we're moving forward.
Can you please isolate me the 2nd channel now
This is testing if complete 2nd channel is messy.
// disable 1+1 & 1+0 left, then swap it to 0+1
You can run just one of both MC links, its ok with your timings.
If both errors the same way, its not board design.
Any case we have a path now.
My guess it will be the RAM itself. Maybe I will need different Voltage settings for this dimm, but swapping the dimms could also help, because the closest slot is better most of the times.
Here is the Y run from the second slot yesterday.
Actually it's funny, with half of the RAM, Y runs with +1 TVB on 58X due to the beefy cooling (chiller is still waiting for joining the loop).
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Its not exactly linear.Thank you. Doing 1+0 now, then 1+1.
My guess it will be the RAM itself. Maybe I will need different Voltage settings for this dimm, but swapping the dimms could also help, because the closest slot is better most of the times.
Here is the Y run from the second slot yesterday.
Actually it's funny, with half of the RAM, Y runs with +1 TVB on 58X due to the beefy cooling (chiller is still waiting for joining the loop).
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Most happens on training. Part happens on tuning.
I need to know which MC fails
0-0, 1/0
0-0, 0/1
Which one is this picture ?
first MC ?
Or maybe both fail~
tibcsi0407
Semiprofi
Sorry, this is the end of the second test. Now runnkng the half of the second slot. Set it to 40 cycles since one cycle is half time now.
tibcsi0407
Semiprofi
I believe it will be around 90 mins. 24 GB dimms need around 20 cycles. 16 GB needs 25. Of course more is better but still have some test left.
Should be training issue, but fixing won't be easy.
Since I already passed several times the 25 cycles test before with both dimms.
But you did with RX-DFE . no ?
It wont be hard.
tibcsi0407
Semiprofi
That's true. Once it was enabled.
But if that's the case maybe we can also fix the issue somehow. At least on 8600.
DFE is used for cleaning signal altogether, not synchronizing signal
// its effect depends on the CTLE (+FOM) & FFE baseline, basically board tuning an filtering that you feed it on.
// Soo it can be too much or not enough. But its an assistant, not a building block
There are 4 potential outcomes for the issue:
~ 4 DQs are unsync ~ VREF is messed up (includes DQ, CS, CA) // fix CTL1 but is a global shift. Far too early for that;
~ DQS 2 CLK is unsync ~ includes VDDQ and herby messes up initial signal // shouldnt be an issue
~ a single trace causes issues due to silk or board bending // shouldn't be an issue
~ one dimm slot is not soldered cleanly // maybe but too unlikely, board is fine
// ~ target pads on the CPU are charred, but far to unlikely
A board & stick limitation you will notice by going gear 4 // unlikely the issue
A CPU MC channel weakness you will notice now // maybe
Bad training you will notice now // maybe +1
Bad RTTs you can notice now // less likely, else one channel wouldnt pass. RTT is inside-dimm.
Most important is to isolate MC-Link from full channel, issue
Then we can work selectively. Doing global changes on a disbalanced foundation is a silly idea.
Soo i will not recommend anything till data is clear
else i'll misslead.My first point is RONs
But without data, it makes no sense to steal your (5-6* 1h y-cruncher) time further.
Need bit more data instead of bruteforcing.
EDIT:
Sending a stronger signal, or sending a delayed signal will fix it
But is not the resolve. Its a bandaid. Sooner or later first channel will also not be able to take it.
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Hab ich gerade auf der Suche nach Riegeln entdeckt und für den ein oder anderen evtl interessant. Bei Ali
tibcsi0407
Semiprofi
Half of the work is done.Most important is to isolate MC-Link from full channel, issue
Then we can work selectively. Doing global changes on a disbalanced foundation is a silly idea.
So i will not recommend anything until data is clear
1/0 channel dropped error 5.
Now running on 1/1, about 28 cycles left.
Actually most errors came last days were: 11, 5 and the single 0 yesterday. This should be my second dim.
Would be a good idea to swap the sticks and see what happens with the one which passed in SLOT A.
But if I take them out, I will replace the thermal pads too. I have a nice Upsiren pad set waiting to be installed.
I was in a hurry when I installed the pads, so who knows, maybe there is not enough good contact and that's why the error comes lately.
The thing that SPD hub is not heating up doesn't mean that IC's are okay.
I could also try to loosen trCD and Trp. At least on OCN everyone is using 51/49 on 8600 and above. I could try 51/51. Maybe that would help to my second slot, even though the Slot A can do that.
Update:
Finished 1/1, it finished sooner. Timings are funny.
Anyway, it passed.
So 1/0 can't pass, every other channel passed with the same settings.
Anhänge
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Danke für die Antwort. TM5 teste ich natürlich auch. Hab mal mit Karhu angefangen. SA, VDD war gefixt, alles andere auf Auto, daher die Spannungswerte.
Meine Ergänzung/Fragen:
- VDDQ_CPU meinst du wohl IVR TX VDDQ? (wie bei hwinfo bei mir)
- VDDQ Training muss ich aus machen, ist auf Auto.
- Fastboot off, MCH on.
- VDD2_CPU, was ist das, bzw wo finde ich das?
RDWR_SG ist auf 21, auch da meinst du WRRD_SG was auf 86 ist? (da minus 16 = 70)
WTRS 8 statt 16 und WTRL 24 statt 46?
Habe es mal im Bild gekennzeichnet.
Anhänge
MC Voltage
zebra_hun
Profi
Ich habe bis jetzt einzeln nie probiert. Es kann sein, B0 kann ich weiter machen, nicht so viele Zeit mit 8000 gespielt.
Traurig, etwas kaputt bei mir. Ich muss jetzt das WBlock abbauen und verwechseln die Stick...
A0 sofort crash, B0 ~20 minute lang geht. Naja, schaut nicht so gut aus.
***Edit***
A0 ist die Linke?
Traurig, etwas kaputt bei mir. Ich muss jetzt das WBlock abbauen und verwechseln die Stick...
A0 sofort crash, B0 ~20 minute lang geht. Naja, schaut nicht so gut aus.
***Edit***
A0 ist die Linke?
Anhänge
AMD Insider
Enthusiast
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Wenn man ein 14900k und ein Z690 Extreme Glacial hat und mind. 64 gb ram benötigt, welcher Riegel würde sich dafür empfehlen?
Taugen die was?
G.Skill Trident Z5 RGB 64GB Kit DDR5-6000 CL30
G.Skill Trident Z5 RGB 64GB Kit DDR5-6400 CL32
Taugen die was?
G.Skill Trident Z5 RGB 64GB Kit DDR5-6000 CL30
G.Skill Trident Z5 RGB 64GB Kit DDR5-6400 CL32
Hast du eine Produktnummer ?
6000 30-36
6400 32-38?
Sollte 6400 RCD 37 oder tiefer sein, ist es ein besser bin.
Spannung ?
6000C30 braucht um den dreh 1.32v
6400C32 auf 1.35 wäre dann besser.
~ theoretisch
zebra_hun
Profi
Weiter getested das komische Stick. (A0)
MC0 C0 ---OK
MC0 C1 ---Katastrophe
Kein Werte da drinn, nichts, sofort crash. Jetzt muss ich tauschen die zwei Stick.
Tibcsi, ok, understand, but so a weird error..., looks like my mobo slot dirty, but cleaned last time. Or stick wrong.
MC0 C0 ---OK
MC0 C1 ---Katastrophe
Kein Werte da drinn, nichts, sofort crash. Jetzt muss ich tauschen die zwei Stick.
Tibcsi, ok, understand, but so a weird error..., looks like my mobo slot dirty, but cleaned last time. Or stick wrong.
Anhänge
tibcsi0407
Semiprofi
I would push some Voltages:
TX: 1.33V
IMC: 1.45V (should be tricky)
I would also try higher SA. In white APEX you need a little bit more. 1.18V for instance
Timings:
tRP and tRCD to 48.
tRFC to 480
tRAS to 64
With these timings maybe you can try RAM VDD/VDDQ to 1.47V. (I know, there is no delta, but 8000 should be easier a little bit)
I would start with TM5 first if Y can run about 2 cycles.
Genau.
Für VST fehlt es an Spannung meistens.
Data / Data Strobe issue . DQ/S
Ich brauche TM5 für die Identifikation.
mm mm , noted.
This will mess him up.
16gb need ~200mV delta 🤭
Genau genau,
Es war spät. Der Gedanke war am korrekten Platz, nur Read 2 Write vs Write 2 Read verwechselt
Danke~~
Y-cruncher 2-3 passes und danach TM5.
Nach Tm5 1usmus_v3 , erst Karhu oder HCI+DangWang. Kommt aufs selbe hinaus.
Mit TM5 bekommst du wenigstens etwas an information was es sein kann.
Aber TM5 wird failen wenn die CPU instabil ist. Dennoch dein startpunkt.
Memory restore context sollte aus.
To tripple checkpdate:
Finished 1/1, it finished sooner. Timings are funny.
Anyway, it passed.
So 1/0 can't pass, every other channel passed with the same settings.
1/1, 0/0 ~ pass
0/0, 1/0 ~ pass
0/0, 1/1 ~ fail
0/0, 0/1 ~ fail ? untestet?
You overworry
Memory is fully fine.
At worst if ICs have no contact, they will be ~15° above PMIC
PMIC and ICs have bounds to copper PCB. Copper does transfer heat
Don't overworry
At the end the day, crashing on 40° vs 30°, its not important
stability needs to be kept up till at very least ++48°
Correct correct is 70°, but thats a powering worry for another day.
tibcsi0407
Semiprofi
First slot both channels passed in the first test.
Second slot in both channel test failed.
Second slot first channel failed, second channel passed.
Now I swapped the dimms and reapplied the thermal pads, cleaned the gold fingers with isopropyl.
Test is running in the first slot. If it will error out, it's the stick, if not, I will start to check the second slot to check again.
If second errors out, it can be both MC and board.
I think the problem is not huge, but it won't be easy to balance out if it will error out again.
If second slot will pass too it means (in my opinion) that the better stick is in the farthest slot, and the worst stick in the closest slot, which helps in stability.
We will see.
This was a really good idea from you.
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Isn't it too high? I can dig up some of my 16GB profiles maybe.
Just to be sure sure
You keep both dimms in , correct ?
If one is unplugged strain and internally impedance can change.
Disabled at least is not unplugged.
Load-resistance changes.
Ah how do you say this. Its not capacitance.
Anywho, its different with 1 dimm plugged in
Or you change RONs and it doesnt matter 🪄
If we have stick issues, we work with per channel RTTs.
But its not. Sticks are at best binned to the closest quality for both subchannels
Its MC-Link that will train differently up to reasons.
It might also not train well either.
Or not at all and follow "median + margin of target SKU"
#5 is not a bad IC.
#5 is a signal loss
#0 is too but a different type.
#11 says in the notes "it might be CAD_BUS", which translates for DDR5 (it might be ODT)
Which again is also not an IC issue.
AMD Insider
Enthusiast
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- 02.04.2004
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64GB G.Skill Trident Z5 RGB schwarz DDR5-6000 DIMM CL30 Dual Kit
EAN 4713294231949
SKU F5-6000J3040G32GX2-TZ5RK
64GB G.Skill Trident Z5 RGB DDR5-6400 DIMM CL32 Dual Kit
EAN 4713294230263
SKU F5-6400J3239G32GX2-TZ5RK
Also eher zu den 6400 greifen? Oder gibt es ein besseren Hersteller?
tibcsi0407
Semiprofi
Yes, since they are under water it's better to mount the block to two dimms.
I know, but maybe it will get better training like this. Maybe with this the RTT's would be more correct. I want to give a chance to this.
Figuring out if one dimm is weaker, will help for target RTTs. Its not really the time now but its a good idea nevertheless.
RTTs are not trained really. Its a lookup table.
Hence disabling training prevents override of uservalues.
Auto is ok for values that are not hardset.
Training itself has a big chance of failure, on unstable settings.
Soo a lookup database is always the (first) better choice.
Yet access to make it a full training should always be given.
@AMD Insider
Wow
6000 30-40 1.4v
6400 34-39 1.4v
beide sind ja richtig ... suboptimal.
Hmmmm
Ich überlege nämlich;
Wenn du nicht besonders OCn möchtest oder es dir Spaß macht dich mit Ram zu quälen.
Preis / Capacity ~ wären womöglich Micron 48gb dimms besser. Für 20€ mehr.
CP2K48G56C46U5 ~ 270€ (+20) (2.80€/GB)
Aber es sind Micron's und diese sind JEDEC 5600 kits.
Keine Hynix-M 4800MT/s
Theoretisch aber, wäre es die schwerere ~ jedoch womöglich bessere Wahl für dein Vorhaben.
// Bei der höheren Kapazität, können mehr "Cells" benützt werden, bevor Timings überhaupt ins Spiel kommen = schneller bei selbem Clock
Ansonsten wenn man nicht mit "Zeit" zahlen möchte:
F5-6400J3239F48GX2-TZ5RW ~ 415€ (4,30€/GB)
KF564C32RSK2-96 ~ 450€ (4,60€/GB)
CMK64GX5M2X6800C32 (64gb) ~ 260€ (4.06€/GB)
Ich würde mir die Microns anschauen.
Aber wäre auch nicht derjenige welche um Hilfe fragen würde
Somit kann ich es verstehen wenn du eher auf 32gb dual sided, anstelle 48gb dual sided gehen möchtest.
Potentiell gibt es auch die Möglichkeit von
"Ich kaufe mir das billige 96GB kit und entlohne Veii's Zeit"
Aber , einfach wird es nicht ~ haha.
Ah, Micron's haben nur einen schlechten Ruf. Sie sind weitaus besser als das was man sie darstellt.
Der (Auto-Werte) Bios support könnte womöglich etwas fehlend sein, aber wer weiß.
Die DIMMs als solches, müssten sich gut benehmen.
Specifications sind immerhin eine Sache. Und Micron sind eher diejenigen welche 8800MT/s anstreben in der Industrie 🤭
Alle anderen halten ihre Specifications privat. Dank Micron (+JEDEC) skalieren unsere APEX boards höher bzw wurde DIMM-Flex zu eine Sache.
Sie verdienen eine weitaus bessere Reputation.
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zebra_hun
Profi
Interesting
Coldboot dazwischen ?
Niedrige VDDQ_CPU hat #0 dropouts.
Also doch zu niedrig. Aber lösbar.
Mehr Spannung hinzugeben, welches irgendwann zu viel für ein Channel wird ~ ist nicht die Lösung.
Beide Channels haben sich identisch zu benehmen (braucht ein ODT Fix, nicht mehr Spannung)
zebra_hun
Profi
7200 und 7600 mit odt's. Leider Werte, die da passen, beim 8000 gehts nicht. Es ist auto jetzt.
Ohne odt's 7200 geht auch nicht.
Odt's von dir, ca zwei Monate früher, nur bischen sollte ich durharbeiten. Von kopf weiss ich nicht, ich muss das Profil einladen.
Ohne odt's 7200 geht auch nicht.
Odt's von dir, ca zwei Monate früher, nur bischen sollte ich durharbeiten. Von kopf weiss ich nicht, ich muss das Profil einladen.