tibcsi0407
Semiprofi
Nope iot was 40/48 on both.
Tried 40-34 34-40 on first slot
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Nope iot was 40/48 on both.
48-40-40-48 maybe ?Nope iot was 40/48 on both.
Tried 40-34 34-40 on first slot
I tried that first, Y stuck, posted a pic.48-40-40-48 maybe?
hmmmwill try it again as the slot B will finish the current run.
It died in both slots, so I guess I need higher impedance.hmmm
Eh at the end its 9*2 combinations
You got this.
2nd MC needs a lower value vs first.
but thats about it.
You knowHaha, it finished very soon.
We will see, but I believe we are close.You know
for this typical bruteforce does well : ')
A spreadsheet
its not many combinations, 34/40/48 * 4
optimally 2nd MC is weaker
And optimally they are reverse-mirrored
I tried that first, Y stuck, posted a pic.
Soo just 2nd keeps failing ?First slot finished on 48/40 - 40/48
Nope, the first slot failed yesterday what setting, today it's passed. I retrained again and it's good now.Soo just 2nd keeps failing ?
Or i missunderstand you 🤭
If 2nd fails on 48-40-40-48 (likely can)
You can try a 48-40-40-40 or even a 48-40-40-34
But i don't think that would do good.
Its bed time for me
Best of success
and i guess if you have plenty of time and finish testing on whatever survives longest
go for CTL1 CtlVref first value 150 , then value 141
Coldboot so it retrains - but only if you are happy with RONs.
For that you'd like to attempt full layout testing.
Any case, its a bonus and shouldnt be done. // one CTL1 value alone is bad, although helpful
But just so you have "work" to do : ') ~ in case you finish faster.
Would be interesting to see.
We may need to mess with VDDQ_CPU when messing with RONs
But getting that training variable away is a good idea.
If you are undecided between 2-3 values. Then longer runtime is required before moving on.
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Be sure that RON Training is off~
Habe es nochmals runtergeladen. Kommen errors beim Anta Profil beim Starten. Also TM5 startet es gar nicht. Hab keine Ahnung wieso.Nimm das angehängte TM5.
Die config ist anders. Das Programm ist anders.
Hat 1usmus_v3 zu sein.
Holy VID@Veii
Some update, both channels passed. I set RON 48-40-40-48 agaiin and reduced TX to 1.32V
Unfortunately I had no time for longer test yet, but I will run a 90 miinutes test in the afternoon too.
The CTL1 is still on Auto. No RX-DFE
CPU is on LLC3 with IA_AC 0.65 and custom V/F curve.
I am happy to our collaboration, I couldn't reach this without your help.
The long term stability is still a quetion, but we are closer than ever.
Was afraid that Groups & RON Play togetherUpdate
It was only stable only until next reboot. More work left.
RTT tuning is next?
I'm slightly afraid its due to VID throttle.Update
Second slot passed too.
VST is slower on this one. VT3 is the same. Interesting.
RTT on Gear 4It was only stable only until next reboot. More work left.
RTT tuning is next?
RON are PCB exclusive and capacity focused.Ron von Tibcsi statt 34/34 ist 48-40 - 40-48.
Das macht VDDQ Training OFF, für dichycruncher gestartet. Error
Ignore clock. It means nothing@Veii how does this look? i have a couple profiles/curves saved since i've been messing with them off and on over the last 3 or so days (1 of the other profiles i have saved is very a similar curve but has another drop at 5.6 which this curve i'm posting now basically just has 5.6 straightened out, but maybe the other curve with another drop at 5.6 is better?)
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Ok thanks i'll take a look at some more stuff, as of right now its stable on all of those but i gotta test PyPrime 2b still, also i'm assuming you want point 1 and or 2 to come up so it isn't so close to 700mhz? and how about the top 1 or 2 v/f points? would those be best smoothened out like the points before or should v/f 11 drop a bit further closer to v/f 10?Ignore clock. It means nothing
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I don't like those
But what matters is not my word or visually.
Sure you can "just trust me"
But I only trust results.
Cinebench R23 & R15 Extreme
Geekbench 3 & latest
And PyPrime 2b
// potentially SiSoftware Sandra InterThread or Core2Core Bench
Track scaling there,
Ignore clockstrap or even effective clock.
It doesn't translate to actual perf.
A lot of things are load balanced.
Now i understand you @tibcsi0407Was afraid that Groups & RON Play together
But it shouldnt.
Its you messing with voltage, very likely.
But i dont think we are anywere near done with RON topic.
Those are values for near identical behavior.
And purposely weak
Its not values for per channel behavior.
700mV is your floor.also i'm assuming you want point 1 and or 2 to come up so it isn't so close to 700mhz?
Ok i'll def move the floor up and try to bring the top 2 spikes atleast closer together, I know somewhere back you said you want something like a double S right? - this is on LLC4Now I understand you @tibcsi0407
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OK, OK.
Well RON is purposely weakened because I expect Encore to handle this
I don't expect WhiteApex to handle this.
They are just different PCBs.
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700mV is your floor.
Don't trust that every CPU will be able to handle 700mV floor.
I don't know substrate too well. Very much not.
We want headroom, because once you start to shift AC_LL - it can easily shift under 700mV
720 is a good place to stay an rather i dislike the shape. It's ok to be near flat or have a small bump.
Top two, the spike bothers me
too much delta between values.
What AC_LL are we on?
Ceiling is complicated, because you work on a curvepoint that you have running clocks onI know somewhere back you said you want something like a double S right? - this is on LLC4
Accc. to Hwinfo it doesn't hit it. The last point boost wants a lot of Vid.oly VID
Now there is no way you don't hit PL4~
I need some time for that, but we are not in a hurry. I have a lot of work in the job.You need to verify current stability for longer duration
Make a docs/excel sheet and track longer if both channels are now kind of similar in behavior
48-40 is weak.
It's ok but its purposely selected weak.
Maybe i remember that some said a zero some said 25.RTL's were on auto for me, that's why I didn't zero out the DR and DD values. Tought maybe I will change it on the end of the tuning.
The problem is,What makes me angry that it can't run 1 cycle now at all. When I change TX and retrain (I use the retrain button, that is like power off and on) it can run for a while.
Yesterday I changed TX to 1.35V and ran 20 minutes on Y.
Is this DQS related issue?
Yes, that's right but MEM_VDDQ never ever was nice under 1.47V for me.Maybe I remember that someone said a zero someone said 25.
mm mm
yes you can keep it how it is, but if you zero RTL, then zero DR.
If you zero R1 and R3, not only R4-R7, then zero DD timings too.
The problem is,
RONs measure with voltages
VDDQ's are the key building block for
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Everything depends on them.
All slopes remain ODTs
Its the main Vref building block.
Delta inside mem doesn't need to exist.
It can, I like it but it's just me.
I like the benefit it gives to lower VDDQ_CPU
But
Low VDDQ_CPU still requires good PCB quality.
Outside of user (A) matching by the board without automatic training
It still is at the mercy of the Mainboard PCB itself and at the mercy of all other potential noise that will mess with it.
So the first mistake will be changing only VDDQ_CPU , but not adapting VDDQ_MEM
Another is that VDDQ_CPU changes, need cold boots.
Far too many things depend on this value, so it might not train clean.
Else messing with SA and VDD2, is the way to go if you change VDDQ_CPU.
Given we never finished with RON testing (for your pcb)
it was far too early to change other variables.
Correct approach was rather to fix RONs
Soll ich also das VDDQ Training ausmachen?Das macht VDDQ Training OFF, für dich
Spannungen sind unpassend = error.
VDDQ_CPU auf 1.38, vorerst.
tWRRD oder WTR, nicht beides zusammen.
ATC hat ein auslese Problem.Soll ich also das VDDQ Training ausmachen?
werd die VDDQ CPU auf 1.38 stellen.
Ich habe beide Varianten versucht.
WTRL auf 30, zeigt aber 28 an
WTRS auf 12, zeigt 10 an.
Habe auch WTRL auf 24 und WTRS auf 8, dafür Auto bei RRD_SG und DG. ODER eben WTRL 28, WTRS 12 und RRD_SG 68, RD 50. Beides gab errors.
Ok, das erklärts. Wie in meinem Post, wo ich den Screen postete vom error ycruncher.ATC hat ein auslese Problem.
VDDQ Training muss auf aus, damit man seine korrekte VDDQ zu VDDQ findet.
"Gab error" bedeuted für mich nichts.
Good job!Something from me to share
Spreading gossip
~ silly low voltage testing on a Board he always disliked, on his timings with my methods
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1.38v V/F
OEM greens.
Not passing actual 70-80° mem tortute and Bios 0081 still has reboot inconsistencies.
But its progress~
He has two.Good job!
The VDDQ_CPU is really nice and low! With P SP118 this CPU should be a beast too.
Txvddq ist mal echt extrem niedrig. Nett und das bei 2x16.Something from me to share
Spreading gossip
~ silly low voltage testing on a Board he always disliked, on his timings with my methods
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1.38v V/F
OEM greens.
Not passing actual 70-80° mem tortute and Bios 0081 still has reboot inconsistencies.
But its progress & ODT PoC~
This is really annoying. My max is 1.235V, 1.24 could already freeze in TM5.14900K was bit better than sugi's
But it has an SA freeze bug above 1.25-1.28v.
Even if it can start with my 1.35/1.48 SA/MC prese