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Something from me to share
Spreading gossip
~ silly low voltage testing on a Board he always disliked, on his timings with my methods Anhang anzeigen 968266
1.38v V/F
OEM greens.
Not passing actual 70-80° mem tortute and Bios 0081 still has reboot inconsistencies.
But its progress & ODT PoC~
Das eigentliche Ziel waren 8800, welche rennen bloß nicht mit y-cruncher
Die selbe CPU kann 9600MT/s single channel auf der Terasse
Die Arbeit hier war für den Faktcheck von
180mV optimal, bis 225mV für 16gb.
Und um die alten Konzepte zu brechen und mit VDDQ Training off zu fahren.
Und Vodt + VDDQ zu VDDQ alignment. Sprich ODT match zu benützen.
Man weiß ja das SA, VDD2 zusammengehen.
Bloß geschieht das ODT tuning im Hintergrund. (nicht groups)
Also Proof-of-Concept lowest voltage stability.
VDD2 ist tief VDDQ_CPU ist tief.
SA ist sweetspotted auf 1.183.
Es ging auch darum, dass VDDQ zu VDDQ
Mit angesetztem SA auf jedem Clock genau so stabil ist und es nicht abändert.
Bzw genau so instabil, fals +/- 5mV daneben.
@Veii messed with it a bit more this morning, raised the low end up and the top end so it would be a bit smoother of a transition while still keeping it at about 1325
Hmmm
Just to verify, sorry if i ask the 3rd time the same question
ICCMAX was 400A
No set voltage on ring,
No set voltage on e-cores
No set voltage on L2
^ no voltage offsets either
No usage of PLLs
CEP off and SVID Preset to Trained
No modification in Loadline's Menu
No BLCK
Ringdownbin remains on Auto
No fixed clock or target clock
TVB was not higher than +1
No usage of processorlasso
Everything correct ?
May you upload the visual curve by Shamino's [ASUS] Tool.exe ?
On .6 IA_AC and .8 IA_AC ~ please.
I need to separate memOC issues by lack voltage for IMC
// VDD2_CPU (MC Link) is not IMC voltage. IMC voltage is auto
from
Peak boost idle freezes
from
Ring and lower clock ramp-up issues (curve inconsistency)
// Ring and Core curve goes hand in hand
So I am back in the game. I decided to replace the CPU for a new one. Finally got the new one CPU and posting progress.
The new CPU has slightly better V/F I think.
Anyway:
The only stable config with your custom V/F is LLC 3, IA_AC 1.0, IA_DC 1.1 ( = auto). R23 pass 10 minutes, Y-C SFT VST VT3 passed 90 minutes, no issue in games, stable all the time.
LLC3 IA_AC 0.9, IA_DC 1.1 is generating whea errors in R23 (screenshot included)
LLC3 IA_AC 0.8 IA_DC 1.1 is R23 unstable = frozen >blue screen > restart
Both curves generated by shamino tool are in screenshots.
I tried as well LLC4:
LLC4 AC 0.5 DC 0.98 - R32 = instant blue screen and restart
LLC4 AC 0.6 DC 0.98 - R32 = frozen after 1 cycle, then blue screen then restart
LLC4 AC 0.7 DC 0.98 - R32 passed 10 minutes, SFT instant blue screen and restart
Memory is at 7600, VDDQ training off, stable TM5 25cycles and VST/VT3 90 minutes multiple times, boots after power off included. Sorry I don´t have the screens, but please trust me.
You can trust me about it.
It looks like the your V/F custom curve is good, but could use probably an adjustment at some point(s), so it could be shifted down with lower IA_AC. It´s my guess only.
ignore the cooler score in BIOS, real number after tests is like 160-170.
Please, do you have an idea what I should do?
Thank you very much.
Habe mal die VDD auf 1.54 gehoben und der Test ging bisschen länger bis zum Error. Was bedeutet eig "Coefficient is to larege. Errors encountered on logical core 0? Letztes mal war core 30.
@Veii messed with it a bit more this morning, raised the low end up and the top end so it would be a bit smoother of a transition while still keeping it at about 1325
Good Timezone,
Just to sanity check
You did use Shamino's WorkTool for this or by hand till it visually fit ?
I hope you have no problems anywhere with 1325mV ceiling.
Its not gonna be actual 1325mV , because it still depends on IA (AC) Supply.
But visually it looks alright
I would see if you can increase the 4.7ghz bump a bit
and drop the curve between 5ghz - 5.8 (~ till 6ghz)
Where beyond 6ghz you can keep the spike up
This one i like, visually looks good
4.7-4.8 usually is the most heavy place and like a bit of bump
700mV floor is the floor, not the target. Its ok if you have 720mV there . Because you will shift it up and down later by AC_LL , with higher MemCLK.
First P2 to -14 (input in tool)
then P4 to -6
P3 to 0
and at the end P6 to -44
Input the calculated "proposed" values into bios
The only stable config with your custom V/F is LLC 3, IA_AC 1.0, IA_DC 1.1 ( = auto). R23 pass 10 minutes, Y-C SFT VST VT3 passed 90 minutes, no issue in games, stable all the time.
LLC3 IA_AC 0.9, IA_DC 1.1 is generating whea errors in R23 (screenshot included)
LLC3 IA_AC 0.8 IA_DC 1.1 is R23 unstable = frozen >blue screen > restart
Both curves generated by shamino tool are in screenshots.
I tried as well LLC4:
LLC4 AC 0.5 DC 0.98 - R32 = instant blue screen and restart
LLC4 AC 0.6 DC 0.98 - R32 = frozen after 1 cycle, then blue screen then restart
LLC4 AC 0.7 DC 0.98 - R32 passed 10 minutes, SFT instant blue screen and restart
Memory is at 7600, VDDQ training off, stable TM5 25cycles and VST/VT3 90 minutes multiple times, boots after power off included. Sorry I don´t have the screens, but please trust me.
You can trust me about it.
VR MAX 1.55
ICCMAX 400A up to your cooling
Maybe lower to 364A for now. It will eat score and hit PL4 in many applications
Soo doing so it can cause mem issues ~ but lets see.
Put Cine R15 Extr (benchmate) into your testing suite
Both Geekbench 3 & 5/6 for dynamic load testing (check scoreloss before/after curve change @ same powerlimiters)
Do not run cine or y-cruncher without ICCMAX limiters. I never trust auto values.
Chance of thermal degradation is very low. (14th gen 105° per core, 95° whole chip is fine)
Chance of current degradation or rather transient spikes ~ is quite high.
Habe mal die VDD auf 1.54 gehoben und der Test ging bisschen länger bis zum Error. Was bedeutet eig "Coefficient is to larege. Errors encountered on logical core 0? Letztes mal war core 30.
Any new updates or shenanigans ?
You definitely want to run some distance between UP & DOWNs
Unless this was pre-factored in.
It would surprise me, but who knows
Given many many complains that encore doesn't work for many people on stock
And how good it can be once tuned (low voltage) without this silly dynamic training
Maybe maybe.
But i doubt.
We want some distance there
now
48-40-40-48
48-40-34-40
48-40-40-34
i cant say.
Not blind~~
Needs active testing
Also start to doubt a bit 0081 Bios consistency/training stability.
With VDDQ Training off and even forced CTL DQ's, it still derps on VDDQ & DQ generation.
To the point where 5mV on VDDQ_CPU can mean long term stability and hardcrash first loop.
Soo something is fishy. Forcing CTL0, forcing VDDQ, their training ability ~ it should not have a reason to mess up Vref. Yet still~
Maybe its DQ between IC skewing that gets messed up and needs read/write centering.
One of both is messed up and does what it wants. What i believe so far. Unclear still
MC01 (2nd)
aka X-X / X-F(fail)
right ?
2nd subchannel of 2nd slot initially failed ? @tibcsi0407
Beitrag automatisch zusammengeführt:
@zebra_hun
With 8000MT/s its not the time to play with per mem-controller RONs
Its too early.
The white APEX is also a good board. Not needed now.
I would focus to figure out what VDDQ to VDDQ you need for your 16gb DIMMs
Encore can run full 225mV delta (16gb), But stabilized at higher clock only with ~180mV
Soo for you likely 170-190mV should be it, once you know a good low voltage SA.
No RTTs no Groups, no PLLs. All too early
Disabled Training and 5-10mV steps on VDDQ till you reach your limit
MCR Fastboot and main fastboot off. Full training and PSU off after first time training-off . . . is required
Absolute max VDDQ on 7600-7800MT/s is similar to absolute max on 8000-8200MT/s
Margins get smaller and max-border gets smaller
Higher SA also lower max margins for VDDQ.
If you keep that little thing in mind, you'll figure it out. I believe
Any new updates or shenanigans ?
You definitely want to run some distance between UP & DOWNs
Unless this was pre-factored in.
It would surprise me, but who knows
I don't know, this seems to be the most stable RON setting so far. But it could be because I have the foundation tuned for this.
I was angry because I got random freeze in TM5 after 45-50 minutes, so I messed with the foundation a littl.e
The freezes ware due to the TWTR L too tight, so channged it back to 24. Also raised MEM_VDD to 1.53V (so it can be divided by 0.15V)
Ran TM5 to make sure my settings are good. And then Y too. Y ran for about 30 minutes, but by a mistake I pushed a button on the keyboard, so no screen from that.
Now you gave me an idea with yesterdays post and typed in your Low Voltage suggestions (For VDD2 I need more, so used 1.45V) for fun. And it was able to run 2 cycles.
The thing is that I was even surprised that it can even boot on 1.185V TX.
Dunno what to do. Messing with RON's, or continue the work based on Equal RON's?
The thing it could run 45 minutes makes me feel that 48/48 should work even tough it's not logical.
I am also skeptical a little bit about the BIOS 0081, and tbh I am expecting to get a new BIOS soon, since this is about 6-7 weeks old. This BIOS releasing frequency is really worse compared to the old one we used to get from ASUS.
We could confirm couple of things
~ VDDQ_CPU under SA is a no go
~ VDDQ to VDDQ keeps the same balance across all clocks. Be it 7800 or 8200.
~ SA messes with Vodt but its a side influence. So it messes with VDD2 & VDDQ due to Vodt change.
~ Thermal has influence (i doubt) on VDDQ but ICCMAX cap has influence on maximum VDDQ delta.
~ If VDDQ is off by 5mV , it hardcrashes. It can train within +/- 15 mV, but it will only be stable within 5mV.
Dunno what to do. Messing with RON's, or continue the work based on Equal RON's?
The thing it could run 45 minutes makes me feel that 48/48 should work even tough it's not logical.
You can try how 48-48-40-40 & 48-40-48-40 behaves.
Logically even if we match signal strength, one channel was weaker
and this is weakest powering.
I expect later VDDQ needs to change, but so far not~
Because like, 5mV missmatch = unstable ~ without VDDQ Training.
It wants from you to get voltages perfect, else unstable.
We could confirm couple of things
~ VDDQ_CPU under SA is a no go
~ VDDQ to VDDQ keeps the same balance across all clocks. Be it 7800 or 8200.
~ SA messes with Vodt but its a side influence. So it messes with VDD2 & VDDQ due to Vodt change.
~ Thermal has influence (i doubt) on VDDQ but ICCMAX cap has influence on maximum VDDQ delta.
~ If VDDQ is off by 5mV , it hardcrashes. It can train within +/- 15 mV, but it will only be stable within 5mV.
Yes, but that makes to change everything and start the research from the beginning. Who knows maybe that's the good way.
Agree with the delta balance, for me 1.47V MEM_VDDQ is a must above 8400 and that affects the VDDQ_CPU too.
SA is a dark horse for me. I can do 8400C36 with 1.12V SA, but I hahard times on 8600 even with 1.22V. it is strange.
I am starting to believe the problem is hidden somewhere in the timings. If we look the OCN posts, no one has tRCD below 51, only me, but I have retrain issues.
So maybe raising can be a good idea.
Is it you released the mod BIOS?
ASUS should be even happy instead to getting free research…
It could be some problem in their HQ between engineers. I mean BIOS versions have totally different behavior.
See the effect reverse
More SA weaker Vodt.
Then maybe things start to make more sense.
Internal ODT is autobalanced. Soo if internal ODT is strong, effects of voltage are stronger.
See the effect reverse
More SA weaker Vodt.
Then maybe things start to make more sense.
Internal ODT is autobalanced. Soo if internal ODT is strong, effects of voltage are stronger.
i meaan.
Its not that hard.
VDD2, is like VDD on mem
Needed for higher clock and supply of low timings
VDDQs tho are the foundation of everything
They are separated of VDD(X) and should be viewed as such.
VDD's are an own thing and for their purpose. Both do not share the same purpose and are not influencing each other.
Even if both happen near each other. They are for different things.
I mean.
It's not that hard.
VDD2, is like VDD on mem
Needed for higher clock and supply of low timings
VDDQs are the foundation of everything
They are separated from VDD(X) and should be viewed as such.
VDD's are their own thing and for their purpose. Both do not share the same purpose and are not influencing each other.
Even if both happen near each other. They are for different things.
I know they are different, but somehow (indirectly) everything is connected to each other.
For me the 1.53V / 1.47V VDD_MEM / VDDQ_MEM seems to be as a base. VDDQ_CPU is always a question and SA too.
Maybe I should fix RTT's and set the Voltages to those. DQS could be the key, since it's based on deltas afaik.
I didn't mess yet with CTL1 values and some other things too.
I was thinking maybe with RU.EFI I could read out the trained RTT values, but I have to find the corresponding lines. It could be possible if I fix RTT's to a random value and look for those HEX values in the application.
What do you think, does it make sense?
7empe found the CTL1 trained numbers with this method last year. (I mean the RU TOOL, for exposing lines he had a tool which isn't shareable)
Thank you!
Did it like that, but getting a red secure boot error screen. Tried EFI shell too, same error.
If the ODT's aren't exposed I won't continue to try that.
Thank you!
Did it like that, but getting a red secure boot error screen. Tried EFI shell too, same error.
If the ODT's aren't exposed I won't continue to try that.
my bro had a couple questions since hes back to using his own cpu now and not me using it lol, he was messing with ACLL and LLC with his v/f curves and was wondering something, so when he has a high ACLL with something like LLC4 or i think just in general a high ACLL (closer to the DCLL value basically) he notices that he can do stuff like 0.130 offsets but when the ACLL is low say something like 0.30 for LLC4 then the offsets can only be like 0.020 upto maybe 0.040, so i think his question would be is it better to do a high ACLL with whichever LLC hes using and do alot bigger offsets or go with a low ACLL and do the small offsets? he mentioned something about his vids/vcore was alot higher with higher ACLL but i've only done my little tests so idk how exactly to answer him
so i think his question would be is it better to do a high ACLL with whichever LLC hes using and do alot bigger offsets or go with a low ACLL and do the small offsets?
Droopy loadline is not a bad thing. The Boarddesigner will know the best what loadline is the cleanest.
VRMax voltage cap should exist ~ 1550mV is a good value
If VID throttle exists, then it will differ on "loadheaviness/n-cores"
AC_LL target is just telemetry faking.
That it works at all, is due to an exploit of our intelligent CPUs
Its not really a target but a range.
0.65 is a good starting point , if you do curve undervolting
FYI, I run AUTO AC_LL on LLC6 and 125mV undervolt on the P and 150mV on the eCores. VF Points for 5800 are elevated by 75mV and 6 Ghz 150mV. Adaptive Voltage for 6200 Mhz is set to 1.56V. VRM Voltage CAP at 1560. Gives me 1.4-1.474V at 6 Ghz AllCore and throttles when temperature / load comes to high. If I use the unlimited power profile, it can run 6.1 Ghz on single and two core loads and fake 6.2 Ghz when under 50 degrees. Prime small AVX, ycruncher and stuff throttle nicely down to 5200-5400 Mhz in the 1.2V range. In daily business I run it in the 1.3V range - all controlled by Windows Power Plans.
Thats how I understand Overclocking/Undervolting. And not that AC_LL messing or manaual VCore that kills the CPU sooner or later.
FYI, I run AUTO AC_LL on LLC6 and 125mV undervolt on the P and 150mV on the eCores. VF Points for 5800 are elevated by 75mV and 6 Ghz 150mV. Adaptive Voltage for 6200 Mhz is set to 1.56V. VRM Voltage CAP at 1560. Gives me 1.4-1.474V at 6 Ghz AllCore and throttles when temperature / load comes to high. If I use the unlimited power profile, it can run 6.1 Ghz on single and two core loads and fake 6.2 Ghz when under 50 degrees. Prime small AVX, ycruncher and stuff throttle nicely down to 5200-5400 Mhz in the 1.2V range. In daily business I run it in the 1.3V range - all controlled by Windows Power Plans.
Thats how I understand Overclocking/Undervolting. And not that AC_LL messing or manaual VCore that kills the CPU sooner or later.
VDDQ d.h. IVR habe ich 1410mv, 1380mv versucht.
VDD2 d.h. IMC Voltage war auto, war aber 1.35, daher sollte es ja stimmen. Werde es aber fixen.
Was meinst du mit PSU aus? Die Änderungen sind ja ja nicht gross oder was bedeutet gross für dich?
MRC Fastboot ist aus.
Limits habe ich auf 253W gesetzt, zur Sicherheit bei ycruncher. Könnte das der Grund sein?
Droopy loadline is not a bad thing. The Boarddesigner will know the best what loadline is the cleanest.
VRMax voltage cap should exist ~ 1550mV is a good value
If VID throttle exists, then it will differ on "loadheaviness/n-cores"
AC_LL target is just telemetry faking.
That it works at all, is due to an exploit of our intelligent CPUs
Its not really a target but a range.
0.65 is a good starting point , if you do curve undervolting
Ok i'll let him know and I assume this is LLC3 or LLC4 to start at 0.65? - i'm gonna have to help him a bunch today hope hes ready haha, last i talked to him he was using something like LLC4 and ACLL 0.30 but all his offsets were like -10 to like maybe -30 max instead of the -125 or more on higher ACLL
VR MAX 1.55
ICCMAX 400A up to your cooling
Maybe lower to 364A for now. It will eat score and hit PL4 in many applications
so doing so it can cause mem issues ~ but lets see.
Put Cine R15 Extr (benchmate) into your testing suite
Both Geekbench 3 & 5/6 for dynamic load testing (check scoreloss before/after curve change @ same powerlimiters)
Do not run cine or y-cruncher without ICCMAX limiters. I never trust auto values.
Chance of thermal degradation is very low. (14th gen 105° per core, 95° whole chip is fine)
Chance of current degradation or rather transient spikes ~ is quite high.
I did some tests with the updated curve, I am not sure how to interpret the results. All tests are done with SVID = trained, 364A ICCMAX.
I also tests original CPU V/F, without any offsets, same ICCMAX, SVID as Trained, AC/DC auto (it sets 0.55AC 1.1DC)
With the improved curve I can only get stable down to 0.98AC, but because 0.97AC is clearly unstable, I am in doubt if even 0.98 could be long term reliable.
1.1AC results are however good, but not much different compared to unmodified CPU V/F. Well, Pi25m is faster with the modified curve, but SFT computing is higher with the original no offsets curve.
Anhänge
new Veii modified VF curve LLC3 AC1.0 DC auto (1.1).jpg
I did some tests with the updated curve, I am not sure how to interpret the results. All tests are done with SVID = trained, 364A ICCMAX.
I also tests original CPU V/F, without any offsets, same ICCMAX, SVID as Trained, AC/DC auto (it sets 0.55AC 1.1DC)
With the improved curve I can only get stable down to 0.98AC, but because 0.97AC is clearly unstable, I am in doubt if even 0.98 could be long term reliable.
1.1AC results are however good, but not much different compared to unmodified CPU V/F. Well, Pi25m is faster with the modified curve, but SFT computing is higher with the original no offsets curve.
Thank you for the testing !
Happy spring festival and CNY. 🤭🎇
Mm curve seems suboptimal
Multi looks ok, but maybe spacing on 4.7 is bad and maybe peaks are bad too.
AVX load looks ok
It needs more work 🙉
Start first with increasing P2 to 0 & P1 to -19
Maybe this fixes bad single score on GB6.
But i think its rather ring + middle section
Then small bump on P8
From -138 to maybe -129
And small bump on P7 from new calculated value, to +12.
I hope thats plenty. Between +9 to +12 ([-] value into less negative)
Build on AC 0.98 then ~ till it improves more.
I see
Yes expected change. I hoped it wasnt such big one.
Early it was 1.1 , then 0.5 and seems now 0.55.
Thank you for confirming~
Then i will recommend 0.9 as baseline now - up to how leaky CPU is
What is your fused V/F curve please ~ in Bios ?
Maybe i missed it.
Ok i'll let him know and I assume this is LLC3 or LLC4 to start at 0.65? - i'm gonna have to help him a bunch today hope hes ready haha, last i talked to him he was using something like LLC4 and ACLL 0.30 but all his offsets were like -10 to like maybe -30 max instead of the -125 or more on higher ACLL