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Naaah, #0 came due to increased strain OR because you had PD timings on auto.
Good finding and time to resolve.
As for what cant keep up on y-cruncher ~ thats a long long topic.
10 is no need.
It will mess and desync writes from reads.
They already are separate operations, but we set RRDS as 8. CCDS as 8
Keep short jumps at 8nCK (failsafe).
Changes there mess with RDRD & WRWR timings.
Too big of a headache.
WTRL is a cpu management part.
Its on it to manage when to do writes within both MC-Links.
Its not memories work,
Memories work is to allow writes at "anytime" within exceptions
Exceptions are not when reads happen and only between Signal Hi or Low.
Soo right in the middle, up to what type of operation has happened and does happen
Right in the middle. Hence alignment exists. But that one is more important for reads and their potential terts.
Writes only shouldnt bother reads and happen whenever. Optimally timings finish and start clean, not cause a halting condition.
This all is called "alignment tuning". Its not about how high or low X single-timing is.
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It's welded from hot rolled profiles. It's a small one, I have much bigger projects, but those cannot be shared.
I worked on some huge projects in Norway too, these smaller ones are not challenging like them, but with a family I don't want to cooperate on those anymore.
I can use the extra computing power from my OC during the FEM analyses.
Designing the basic static calculations in AxisVM and then starting modeling in Tekla Structures, during the modeling I do the FEM calculations for the connections and details in in IDEA Statica and when it's done we do the workshop and erection drawings in Tekla.
It's a back and forth work, like mem OC, the difference is that I know why I am doing the things in my job, but in mem OC I am just starting to understand the things. I wanna know how it works, because that's how my brain is working.
For small projects it's easy on bigger ones we need a lot of meetings and discussions.
WTRL is a cpu management part.
It's on it to manage when to do writes within both MC links.
It's not memories work,
Memories work is to allow writes at "anytime" within exceptions
Exceptions are not when reads happen and only between Signal Hi or Low.
Soo right in the middle, up to what type of operation has happened and does happen
Right in the middle. Hence alignment exists. But that one is more important for reads and their potential terts.
Writes only shouldn't bother reads and happen whenever. Optimally timings finish and start clean, not cause a halting condition.
This is all called “alignment tuning”. It's not about how high or low X single-timing is.
I will change it back to 8 and check it again. It was 8 in the past, just now I tried it with different values. I think I still have some spare performance in the 8533 profile, so needs further testing.
8600 is still waiting for me, but I will start it with C36 too.
There is
Yesss
Thats awesome haha
Must be very fun.
I want to explore this simulation-field but in PCB Design (EMI) & Memory design. If somebody gives me that chance.
Already do inspect traces and design on new board releases , haha. And learn/fool with dimm-pcb's a bit.
To isolate issues
For me to see if its a min/max overlapping issue
~ or it has nothing to do with the writes and link drops-out because of other variables like something ODT based again changed and your voltages are off.
Thats why the two tests
One to see if it overlaps due to slow WTRS and one to see if they again changed things around internally.
As defaulting to such low WTR_ , will cause issues unless reason was careful design.
Its since 2-3 bioses that way and you mentioning "lowering them back to Auto caused that #0"
10K Gear 4 is waiting too :P
On german there is a fun quote
"Kleinvieh macht auch Mist"
In our case its "little changes contribute to a better foundation"
And a better foundation is better results overall~
No time gets wasted~
Either for personal work or for global contribution & Bios-Devs watch over all our reports.
No reports means rather no progress.
I hope Micron ProOC kits release soon.
EDIT: Oh right, no MC_VREF tuning for now.
I know i've given you only 30% but noo, step by step. You have other stuff to improve first;
We do tho may work on VPP_MEM & PLL soon slightly.
Because you run lower temps than the rest.
Just need to be careful, because copying-data without reason why happens too often.
Then we are the fault of causing confusion when stuck in unresolvable mem-issue rabbithole.
I want to explore this simulation field but in PCB Design (EMI) & Memory design. If someone gives me that chance.
Already do inspect traces and design on new board releases, haha. And learn/fool with dimm-pcb's a bit.
Yes, and this is not the first time. But if I leave every terts on auto it will set it to 16/8 22-22 16/8 62/52
Something is not okay with timings there.
Maybe they don't like the TWR?
10K Gear 4 is waiting too :P
In German there is a fun quote
" Small cattle also makes crap"
In our case its "little changes contribute to a better foundation"
And a better foundation is better results overall~
hope you don't mind me formatting it a bit and translating.
First of all, Heel hartelijk bedankt !! 🥺
I was down a lot, but its nonsense really.
Your words are heartwarming 🥲
Thank you !!
Thank you for jumping platforms back and forth, dealing with i guess weak "me?" throughout the years
And still remaining polite and motivated within our sometimes-hard to work on field and ecosystem
Also thank you for sharing your private workfield with us.
Tech is a very difficult field , especially compared to the other hardworking art/music industry.
Harsh but at least not that, haha.
It would be a waste to trow away the many years, even if its half of me.
It still makes fun, when you slightly modify what work you do, who you work for and take time off for yourself.
As for a Team part.
I'm basically alone.
Sorting back and forth, i remain alone.
Sometimes this helps, but often times its just lonely.
There are one handful of people that co-work with me and remain in my life
But with lets say 1000 public people, 990 are just using your work.
Tho it can be also just my stupid head not realizing the difference.
You know how it is~~
As for the support/income part,
Yea there is nothing. There were different attempts, but they all feel abusive to the supporters.
I haven't found a satisfying middle-ground as of yet, nor found fully a way to mix both sides of what i grow up with either.
Still thinking what field to stay on or how to mix, but it should be noticeable sooner or later.
Thank you from my side again, for the nice words and inspiration of not giving up on all this. 🙇♂️
Yes, nothing to hide, it is better to be a little human, at some point we will have to talk to a bot. Personally and professionally, I try to connect with people, Im dedicated to sales matters, but with great technical background. Anyone can work well, even with "power", and put their ego aside a little. I see many members in various forums posting results, it isn't known if it's efficient, if not. Others who don't want to learn and just want an answer to play a game.
I go back to what I was telling you, a couple of months ago I was lost with a Hero 790 and I could barely achieve stability on 7200, making contact through Bianvao with the Asus Dev Team for 2DPC, and you shared with me an incredible configuration, I achieved not only stabilize the memories, but also my 13700k. I was happy with my 8266 configuration and when I changed the CPU to a 14900k, which luckily I got a pretty good one (I don't have as many possibilities for returns as in other countries), I started looking for efficiency. Surely I could go to 8400 and with good cooling, maybe something at 8533... it is not my goal, but I would like to try. So at least we have to be grateful.
Sometimes I listen to some yourubers who have their supporters platform, and they buy various mobos, CPUS, and how much do they charge? 400? 600usd? I don't know. What I do know is that you could easily have different components to try, and continue with a small business model that does not necessarily have to be the only one. The forums are like having a retail on the street, anyone arrives, with a bad character, with a bad day, with different personalities. If in a company, thanks can be given (in money) to peers or colleagues, why can't it be implemented? You would have to think a little about the business model, here you have a supporter!
And to give you another more positive piece of information, a few days ago you recommended a configuration for 8000. I tried both BIOSes, the 1001 achieved the same at this speed as the 0080, but not in the 1002. I just achieved a delta of 210mV, but since I read this entire forum, I borrowed some past advice:
8000C38
VDD 1.44,
VDDQ 1.38
SA 1.14
VDDQCPU 1.17
VDD2 1.35 set / 1.296 under load
VCCIN AUX Auto
Since I had crash problems with VT3, and from what I read it is sensitive to Ring/Ecores, I set an offset of 0.05mV to L2 CPU to 1.2. And, I set IVR Transmiter VDDQ ICCMAX to 12 (this doesn't limit anything from my tests, the maximum value is 15 for 4A although below it says 511Amp, so for 420 it would be approx 12, but don't notice a cap), also set Unlimited ICCMAX to Disabled and CPU Core Cache Current Limit to 420 (this was the key), because it allowed me to run VT3 even at 310W without reaching thermal throttling 298W (VST)/310W (VT3), without hitting thermal throtling
Use your TRFCMini spreadsheet to set the powerdown values (very well explained in several previous posts here)
SPD HUB VDDIO to 1.1V
DRAM VDD/VDDQ Switching Freq to 1.5 and DRAM Current Cabability to the max (7.85)
RTLs R3 to 7 set to 0 and in tertiaries dd/dr set to 0 also
And most importantly, RTTs as you had taught me, 48-34-34-34/240-0-0/60-40-40 with RON 48-40/40-48 and Ctl0DQVrefUp/Dw. From what I read, lower SA values allow or have stronger ODTs. I had understood that for low voltages, perhaps 40/34 was appropriate.
I'm a little concern of cold retraining. I did several tests always turning off the PSU, even changing the BIOS to the secondary. This is the first configuration I've seen that doesn't fail before 1hour. I'll try later today to see if I don't have a YC error on the first boot. TM5 never caught any errors with these timings or voltages, even without training well and failing YC.
Isn't the MC set at 1.35 very low? My VF reaches 1428 and starts very low (P114E88) For now, without claiming victory, it would seem fine!
We'll see if the reboot allows it (later), so I have a good foundation to grow on.
Thanks!
Ye must be
22-22 is ok. Its a long topic i'm not master yet
Its a topic with WPRE, Preamble delay, DQS offsets and tWR
Its mathematical confusing. Basically lower, much more perf but limitations are complex.
1N vs 2N is factored in and ya. Better stay on spec which is 22.
But they will not be a cause of #0.
They might be a cause of other issues like #7 or annoying #8.
I go back to what I was telling you, a couple of months ago I was lost with a Hero 790 and I could barely achieve stability on 7200, making contact through Bianvao with the Asus Dev Team for 2DPC, and you shared with me an incredible configuration, I achieved not only stabilize the memories, but also my 13700k. I was happy with my 8266 configuration and when I changed the CPU to a 14900k, which luckily I got a pretty good one (I don't have as many possibilities for returns as in other countries), I started looking for efficiency. Surely I could go to 8400 and with good cooling, maybe something at 8533... it is not my goal, but I would like to try. So at least we have to be grateful.
Ohh , wait - i missed that completely
You run 8266 on the Hero ?? haha
It must be soo long ago, i have forgotten or never exactly noticed.
It also must be funny, because rarely much translates from 1DPC to 2DPC.
Even if on design its tried to have similarity, they still are different, due to unpopulated slots.
I mean, some 1DPC boards experienced channel design issues, due to only using 2 slots.
I very much thought about it couple weeks ago, to also "improve" that ecosystem a bit
Especially when you look at the gaming userbase, or many sellout tweakers (mind you some are very nice and just try to survive + are open to learn)
But most , a big big percentage are sellout guys. Just marketing i guess haha.
Personally have some issues when it comes to going the marketing path
I can't, as somebody who lived?lives with very little or watches people in my friend fall from their popular position
From 6 digit music studio worker (mutual) to a father who can't even behave humane to his daughter nor find time for his wife.
Greed all just greed.
So from the other side of the medal,
A good mentor of mine, who had a great career as pianist in decently well build houses and placa's & also often produced for people in Bulgaria
(turned) To a for the state titled drug addict, aggressive husband who has to count pennies after pennies to either buy food or starve and buy cigarettes.
He was/is a good person, but that guy also felt into the ... oh well, politically incorrect conspiracy stories field.
Ya, my "little child" past has been adventurous seeing how those people raise and fall.
Soo given i've slept mostly in music studios as child, school education was low priority.
But to stay on topic ~ i very much dislike what money does to people and greet.
I can understand and relate how difficult it is to have nothing and be treated like 🗑️ or an id*ot when you dont value or play with money.
Soo i do have some personal look on this and what should be charged how much.
Knowledge always ! has to remain free.
The time one spends , the time borrowed and the creation of a product are different things.
But i struggle to run such businesses like those guys. I could p*ke when i remember how people treat others based on money.
Thats one of the reasons i'm struggling with such practice ~ although from the business perspective X youtuber does well tbh.
Really not too bad, just trades off ... well drama , bad pr and the usual which should keep clients retention.
On my side, human to human communication was all that matters.
Artist/Producer field still has a lot of snakeoil marketing bs haha, but at least you work there with the human as the product
Not the product as a salesman. Soo the focuspoint is westly different and in how i would do business.
And, I set IVR Transmiter VDDQ ICCMAX to 12 (this doesn't limit anything from my tests, the maximum value is 15 for 4A although below it says 511Amp, so for 420 it would be approx 12, but don't notice a cap), also set Unlimited ICCMAX to Disabled and CPU Core Cache Current Limit to 420 (this was the key), because it allowed me to run VT3 even at 310W without reaching thermal throttling 298W (VST)/310W (VT3), without hitting thermal throtling
Ring has own
IA supply has an own
GT has an own
And i dont know about VDDQ ICCMAX, but it likely can stay maxed. Although i dont how to track it really.
I think ASUS Worktool doesnt list this - maybe , been some time now.
Thermal throttling is not bad , really is not.
Its soo much better than an emergency powerlimit.
PT1 / PPT is a low powerlimit, its basically a PSU limiter & used as TDP limiter.
PowerTarget? 2 is the same limiter but the short side of Wattage. As wattage/sec is a very silly "Title"
Wattage is a durational powerlimit. Electrical limiters are softer and per-core thermal limiters are much better than this. *
* as long as you don't reach TJ-MAX limiters. Those are emergency limiters too.
Wattage also doesnt equally translate to heat.
Soo its the least split in short and long durations.
ICCMAX is more of a transient and substrate limiter than it is anything else.
Its good to have it set, but if you have no margins, it absolutely will ruin your higher clock and usable raw performance.
Soo i see why it is at 510A on OC boards, even if this definitely does damage CPUs.
We are just an exception and a little % of the actual userbase.
I don't like myself that its silly silly high. Even 400A is silly high but Intel™ says its fine within some reasons.
VRMAX for example defaults to near 1700mV too, instead of staying at 1550mV peak.
Just an OC board, thats all.
And our contributions at best help Boardpartners or people who look for answers
But in reality we are a fractional influence to this industry. Hence ego of many plays a role and often its called "a casting show".
Oh well, i guess everyone tries to be recognized
I have a little fight with tCKE timing still.
But not in the position to ask FutureplusSystems for an Interview.
I could use some help there, because there is conflicting information out there on how clock-halting functions.
So far based on userreports its fine how it is, but ya. I can't 100% say its perfect
This you need on cold only and if you fool with PLLs.
Or if you have strange dimm-pcb or you have an overheating mainboard that has trouble with i²c link from cpu to mem.
Its an old information and we/i started from scratch cleanly.
Its not needed but it doesnt harm i guess~
And most importantly, RTTs as you had taught me, 48-34-34-34/240-0-0/60-40-40 with RON 48-40/40-48 and Ctl0DQVrefUp/Dw. From what I read, lower SA values allow or have stronger ODTs. I had understood that for low voltages, perhaps 40/34 was appropriate.
Well this is an old quite extreme one , and was me bruteforcing with the foundation of a on a wise engineer, haha
I think for this extreme set outside of having thermal stability trouble ~ you will have MemPCB trouble.
It is for XOC conditions haha.
Groups and RONs go together
RTTs stay on mem.
Those RTTs are for hungry Dimms. Mostly G.Skill's are hungry.
I kind of would not run this anymore.
RONs are silly. 40-34-34-40 is for high SA and "normal" Mainboards.
This is a strong set. 48-40-40-48 is a weak set and its funny to see it working on other non Encore Boards.
Rest is fine mm mm
But i might go and redo RTTs.
Groups , hmm well that's an ASUS thing. But tuning wasnt all too bad there i guess.
I was inspired from Micron and Samsung, but had to change things around because Hynix ICs slightly behaved different.
Same set probably with different RTTs may work
But also ... FW guys @ ASUS-HQ know their tuning now.
I was just going my own path as always. As Legacy Z690 APEX and then early friends Z790 White APEX shared similarities.
Found some issues, worked on others.
Main one is CTL1 difference based on your current powering.
CTL1 & 2 work together.
All 4 values scale based on your powering. Only CTL0 scales by clock.
Remain signal shifting is done differently.
But why should we shift the signal on a Board that is designed to run 10K MT/s with "ease".
Its too early for that part of the tuning.
Only interesting part is either DQ VREF (as VDDQ is key to everything)
Training for the 4 DQ's. So also delay shifting algorithms for read and write leveling.
And i guess playing with DFE a bit, after ~ you are done with your foundation
Before the rest is on Auto, it makes no sense with signal filtering algorithms.
Boardpartners and MemVendors will know the best what their Hardware likes
Ye must be
22-22 is ok. Its a long topic i'm not master yet
Its a topic with WPRE, Preamble delay, DQS offsets and
Its mathematical confusing. Basically lower, much more perf but limitations are complex.
1N vs 2N is factored in and ya. Better stay on spec which is 22.
But they will not be a cause off #0.
They might be a cause of other issues like #7 or annoying #8.
Yep. Now it works with 21/21, but long test awaits.
When I have MCH Fullcheck on with 20/20 I can't even boot. So 19/19 what we see on OCN is fully no bueno if you follow the rules.
This is so freakin complicated.
Yep. Now it works with 21/21, but long test awaits.
When I have MCH Fullcheck on with 20/20 I can't even boot. So 19/19 what we see on OCN is fully no bueno if you follow the rules.
This is so freakin complicated.
Interesting
That might explain some things why i and colleague could never run MCH Fullcheck
But why does this happen.
Does fullcheck mess with signal alignment vs ASUS own defined values.
ODTOnLatency duration is a mess, but there is DQS_Offset, that goes into this math.
WPRE, i wonder what it defaults too so far.
But ya things improve , thats great. Finally.
OCN sometimes does silly things because we still live in the past. Here and there
"And specifications are slow", you know : ')
No seriously, that's interesting to see.
I wonder why it does that.
Thank you, good find~
If you find WPRE or WrPRE (small r) , you can send it over (memtweakit or ShaminoTool)
22 for 8400 upwards.
CCD_L but influences RDWR too. Other value is DLLK which influences XS_DLL. (Value for Bios -1, but HQ listened to me and implemented it now)
// Giga still doesn't listen but also gets CCDL compleetely wrong.
2nd value is CCD_L_WR (double CCDL)
3rd value is CCD_L_WR2
_WR values can stay equal to CCD_L because we run two MC links per DIMM.
We bypass the design limitations slightly. At worst CCDL+2
// Because BC8. Writes happen in the middle of that, aka 4nCK and that value /2 subchannels.
^ but that's theory.
CCD_L_WR is a special kind and we do have WRWR replacement for that. Like we do have RDRD timing for tCCD_L "replacement"
Its not exact replacement, but it can take over as CCD_S/L/X are bank jumps. This can be controlled and aligned differently too. For example with RRD & WTR.
EDIT:
You can definitely work on lower WTR_L.
26 is an odd number.
You can try what happens if you run RRD_L as 9 and WTR_L as 18.
Seems CPU/Bios can do WTR_L 18.
Isn't the MC set at 1.35 very low? My VF reaches 1428 and starts very low (P114E88) For now, without claiming victory, it would seem fine!
We'll see if the reboot allows it (later), so I have a good foundation to grow on.
Thanks!
Interesting
That might explain some things why i and colleague could never run MCH Fullcheck
But why does this happen.
Does fullcheck mess with signal alignment vs ASUS own defined values.
ODTOnLatency duration is a mess, but there is DQS_Offset, that goes into this math.
WPRE, i wonder what it defaults too so far.
But ya things improve , thats great. Finally.
OCN sometimes does silly things because we still live in the past. Here and there
"And specifications are slow", you know : ')
No seriously, that's intertesting to see.
I wonder why it does that.
Thank you, good find~
If you find WPRE or WrPRE (small r) , you can send it over (memtweakit or ShaminoTool)
To be honest I keep it enabled always about 3-4 months ago. It helped me a lot to find stable timings.
Do you think it can mess up the signals and would be more stable if I disable it?
Actually I did the same on OCN in the past. When you first asked me why I am doing that I had no answer, only "it works". Needed some time to finally understand that what I am doing is not good at all.
On OCN, many guys now using the values we use which is a good thing.
The problem that the biggest guys there still running every timing on edge, and until they don't change on this, it won't change globally.
To be honest I keep it enabled always about 3-4 months ago. It helped me a lot to find stable timings.
Do you think it can mess up the signals and would be more stable if I disable it?
I dont know what it exactly trains and tunes.
It certainly overrides the lookup table on some values.
The same goes to ASUS training vs auto training preset
ASUS training definitely does own things, but what is better idk
Nobody i talked with does know what HQ has defined there, haha
SD himself said
I'm not sure i understand it well.
Gear 2 needs LN2 mode enabled + preset mode2 ?
And G4 needs non of those and is by default changed ??
I don't understand haha.
But ya whoever made 1002 ~ it is different from 1001
And they will unlikely tell what they changed. Due to competition.
Can only guess or dig, but deconstructing is too much work.
I think fullcheck or not
When you force values, it doesnt matter much how it tries to train.
Because the important end-user parts, you override
And the rest already has lookup-tables.
Biggest gripe i have currently, is everyone running all terts on value 4
This is sooo silly and a misunderstanding of specs.
You can't put WRWR and RDRD on the same foundation. It will never have the same minimum duration.
// those are mathematical offsets, not burst based values. They are a (transmission) math result not signal value limitations Value BC8/2 is incorrect.
MemoryVendors do the same mistakes due to OCers.
But tbh it was the same on DDR4 with value 1 vs value 2.
Why not just value 0.
Fully off. Wastes no resources nor messes with impedance.
I don't understand haha.
But ya whoever made 1002 ~ it is different from 1001
And they will unlikely tell what they changed. Due to competition.
Can only guess or dig, but deconstructing is too much work.
It's a mess. There was a BIOS after the first release which totally different than the previous one and after they reverted to the previous and new release was based on that version.
You can't just change direction totally in developement, because it's an issue for users.
When you force values, it doesnt matter much how it tries to train.
Because the important end-user parts, you override
And the rest already has lookup-tables.
I want you to force some more values, but you got no access to.
Eh first figure out what becomes the new foundation 1001 or 1002 :P
Later find that ami tool, to have more fun with the bios.
It's a mess. There was a BIOS after the first release which totally different than the previous one and after they reverted to the previous and new release was based on that version.
You can't just change direction totally in developement, because it's an issue for users.
If you have 2-3 ppl in Developement with different branches.
You can haha. If you're ASUS too, you can do all sorts of stuff as long as end-result is beneficial and optimally sells well. 🤭
That's what being a high earnings Boardpartner allows you. I miss EVGA
You can not do that for public releases tho.
For community testing bioses its ok. We are a fractional userbase compared to all other users who run final bioses or maybe update once every half year.
Im happy that its being said on what this testbios even is. Its 1002 based.
Soo testing 1001 vs 1002 is now on you
Why 1001/2001 was taken down, nobody knows.
Its ok, we are past that part too.
Lets just figure out what bios behaves better - without knowing who made what.
I think i got permission now to share 0081 unlock.
But ppl who mod it, still didnt restore the most important part , which is mem Debug menu.
At least you can fool with some other things like Ring V/F.
Probably figuring out what is a better bios 1001/1002 has priority.
To know what should become the new standard. 9901 is for Gear4 fun, 0080 worked too but ya 9901 is for XOC fun.
Beitrag automatisch zusammengeführt:
That many Bioses, i wonder when EEPROM will give up due to many many write cycles : ')
Joking haha.
I want you to force some more values, but you got no access to.
Eh first figure out what becomes the new foundation 1001 or 1002 :P
Later find that ami tool, to have more fun with the bios.
Higherup says no
Soo BiosDev tools are your only choice to mess with it.
RuTool might have access, but AmericanMegatrends own Tools are cleaner to work with.
You'll find it , if you search much
I can take a look in a bit (if some of the SI's uploaded some new compatible version),
but ... it should be without saying that i can not upload stuff that is not my own.
Modders are weak to restore wiped menu points
I'm ... busy its too much for hex work. Its silly but still higherup says no.
So no reason to try and be rebel.
They dont want ppl have access to boardtuning options. And i guess thats also ok.
You can mess with some options in a different way~~
Grab SCE from it
Make 3 BAT files
Export.bat SCEWIN_64.exe /O /S Bios.cfg pause
Export_Full.bat SCEWIN_64.exe /O /S BiosFull.cfg /sp /g /ce pause
Inject.bat SCEWIN_64.exe /I /S Bios.cfg pause
Like this:
In Bios enable "Publish HII Resources" ~ near the Boot place.
Its near the Secureboot & Flexkey option.
I think there is also a setup_var lock, but lets see later.
Then export the cfg , may upload it here too
Unused items need // on them
You should resolve all layout issues (some FW Engineers leave a mess in there, same for ACPI) before injecting the fixed config
The tool will warn you if something is unresolved
And so on~
Notepad++ works well for such files, with color-coding of choice.
h zusammengeführt: Vor 35 Minuten
Running 6h y-cruncher for VREF tuning, is more time consuming vs testing which bios treats you better
Beitrag automatisch zusammengeführt: Vor 15 Minuten
@tibcsi0407
Oh hey i found something from Lenovo™ Enterprise solutions ~ its 2023 version, but it should work https://download.lenovo.com/servers/mig/2023/10/24/58577/lnvgy_fw_uefi_xwe160d-1.14_anyos_32-64_tools.zip
Grab SCE from it
Make 3 BAT files
Export.bat SCEWIN_64.exe /O /S Bios.cfg pause
Export_Full.bat SCEWIN_64.exe /O /S BiosFull.cfg /sp /g /ce pause
Inject.bat SCEWIN_64.exe /I /S Bios.cfg pause
Like this:
In Bios enable "Publish HII Resources" ~ near the Boot place.
Its near the Secureboot & Flexkey option.
I think there is also a setup_var lock, but lets see later.
Then export the cfg , may upload it here too
Unused items need // on them
You should resolve all layout issues (some FW Engineers leave a mess in there, same for ACPI) before injecting the fixed config
The tool will warn you if something is unresolved
And so on~
Notepad++ works well for such files, with color-coding of choice.
Oh right,
Because this should use low access drivers
Maybe WinDefender Core Isolation & Memory isolation - maybe needs to be off
But you'll figure it out
And maybe you need to run cmd as admin permission and then "cd .." & cd C:\Users\Tibcsi\Downloads\ to the folder path
It works fast if you hold shift + rightclick on the folder & press copy as path
Then you can just rightclick on terminal/cmd/powershell and it will insert the target path
Oh right,
Because this should use low access drivers
Maybe WinDefender Core Isolation & Memory isolation - maybe needs to be off
But you'll figure it out
And maybe you need to run cmd as admin permission and then "cd .." & cd C:\Users\Tibcsi\Downloads\ to the folder path
It works fast if you hold shift + rightclick on the folder & press copy as path
Then you can just rightclick on terminal/cmd/powershell and it will insert the target path
Thank you! I think I will handle the CMD. When I was young I had MS-DOS and Windows 95, played with Volkov commander and things like that on my 486DX2. LOL
Es war eine allgemeine Feststellung/Meinung.
Nicht das DU das machen sollst.
Definitiv nicht jetzt und absolut fehlt es mir an Daten.
Zwar gehört all das zu MemOC Knowledge, jedoch braucht eine Doktorarbeit faktuelle und wiederholbare universale Daten.
Mir fehlt es an Information, Hardware & Mathematischen Rechenwege um faktualle Daten zu produzieren.
Wir reden hier von einem Hobby und Du machst eine Doktorarbeit daraus. Es ging darum den User "an die Hand" zu nehmen, um grunlegende Dinge zu erklären.
Zum Beisp. " wenn man dort einen Wert ändert muss man dies oder jenes beachten", weil es zusammenhängt.
Egal ob Timings oder Spannungen. Manchmal habe ich das Gefühl das Du einiges zu persönlich nimmst.
ayyy got the day off again - did a bunch of testing this morning mostly on the 9901 bios although wondering should i swap back to 1001 or 1002? I don't seem to have a problem on stability anymore for either of them after fixing my curve a little but seems like so many bios came out is there a " correct " one to use or just whatever works? I see @Veii said that 9901 bios is more for XOC/gear 4
another thing was going through some settings, do you guys normally leave these on enable or disable or auto?
Intel Speedshift
Intel Speedstep
selfrefresh enable (i seen something on this posted awhile ago but lost it in all the pages back, i think set to 1 is enable and 0 is disable but is it needed?, wanna say it was memory related)
selfrefresh enable (i seen something on this posted awhile ago but lost it in all the pages back, i think set to 1 is enable and 0 is disable but is it needed?, wanna say it was memory related)
My 14900KF which I've referred to as a "dud" that can't stabilize 8400 even on Gskill 8400 sticks and never does more than ~1.05 x 10^10 VST/1.1x10^10VT3 all of a sudden does near full bitrate with Y-Cruncher limited to 32GB on my 2x24GB kit.
1.22 x 10^10 VST, 1.41 x 10^10 VT3. Wattage is 10-15W more with the higher bitrate/limited RAM usage.
My 14900KF which I've referred to as a "dud" that can't stabilize 8400 even on Gskill 8400 sticks and never does more than ~1.05 x 10^10 VST/1.1x10^10VT3 all of a sudden does near full bitrate with Y-Cruncher limited to 32GB on my 2x24GB kit.
1.22 x 10^10 VST, 1.41 x 10^10 VT3. Wattage is 10-15W more with the higher bitrate/limited RAM usage.
Mal eine Frage. Gibt es für die älteren Bios auch ein ME tool um auf die derzeitige version zu updaten?
Hintergrund ist das ich auf dem 2. Bios mal die 0904 installiert habe mit dem letzten ladbaren Meupdate.
Mit diesem Bios scheint es besser zu laufen . Mit meinen letzten und nur der änderung der sa von 1,131 auf 1,151 läuft es rund.
Zudem hat sich der SP irgendwie deutlich verändert ohne daß ich bautechnisch was verändert hätte :
Das ME Update kann auf jedem Bios ausgeführt werden (in Windows)
Die Firmware sitzt auf dem jeweiligen Bios-Chip & hat einen Downgrade lock.
Das ME Update führt permanente Änderungen in der ManagementEngine der CPU aus.
Der SP Algorithmus ist pro Bios Version unterschiedlich und wird stätig nachgebessert.
My ring is running at 5000MHz under load even with 5900MHz on Pcores and 5100MHz at idle (6.0GHz Pcores at idle).
I'm having a difficult time getting the Cache/Ring SVID Offset to work. I want it to idle at 5200MHz and run at 5100MHz when Pcores are at 5900MHz. Sometimes cores downclock to 5800MHz, usually during transients between iterations of VST and VT3, which 5000MHz ring would make sense for.
With fixed voltage 59p/47e/52r worked at 1.25 Vmin, but cause the adaptive voltage profile occasionally downclocks to 58p, my 47x for e-cores is not an option.
I really wish you could set Ecores and Cache V/F points.
Du solltest umsteigen auf Y-Cruncher zum (vor)testen. Also ich geh davon aus, dass das Sys bei dir daily läuft.
Oder ein anderes Programm. Y-Cruncher ist ganz gut.. zwar kurz, aber hart. Und es spuckt eine Zeit aus, die einem verrät, ob das neue Setting auch flotter ist. Dann kann man sich an längere Tests machen, wenn man das will.
Should be a small detail, but where?
Value BC8/2 is incorrect.
