[Sammelthread] AMD K7 - Sockel A (462)

Ja genau, nur Multi 13. Ich wollte das trotzdem probieren. Richtig günstig war die CPU nicht, aber Stepping und Woche haben überzeugt.
So wie es aussieht, schafft die CPU ca. 2480MHz / 1,67V / 32M. Nicht der beste bin, aber weit davon der schlechteste zu sein. Bin gespannt, wie hoch ich die CPU unter Luft bekomme.

E: ~2560MHz / 1,775V / 32M

Raiden Zero schrieb:
Edit: Hm, also mit 1.77V komm ich zwar locker bis Loop 15 oder so, aber durch läuft es erst mit 1.82V. Schade und etwas überraschend. Bisher war der Sprung von 1M auf 32M eher so 0.03V, bei der CPU ganze 0.08V.
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Bei mir fangen die guten CPUs ab 2500 / 2600MHz an zu saufen. Sprich, 2500MHz bekommt man mit ca. 1,65V hin, ab 2600MHz muss ich die Keule raus holen. 1,8V oder so.
 
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Ne, ich denke soweit kommt diese CPU nicht. Werde aber weiter testen. Auch mit höheren Spannungen. 2700MHz wäre toll, denke aber, dass diese CPU das nicht schafft.
Meckern werde ich nicht. Die CPU ist kein Fehlkauf. :d
 
  • Danke
Reaktionen: Tzk
I found myself a brand new Geode NX 2001

IMG_8329.jpg


Edit: I did not loose the touch in photography I see (quick picture).
 
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A nice and still clean one. I had this Geode CPU until the DIE broke in two.
Unlike the other Geode CPUs, it has locked Multis. Mine clocked below awerage. So it wasn't a big loss.
 
I am expecting it to not clock well, but let’s see what it can do. It is a low batch number. And it’s color is even and blue. That might be good.
Besides that my other Geode’s suck as well. Clocking them is always a pain. This cpu at least has multi 13.5, that would be good for cold. 13.5x222MHz would do 3GHz.
 
Same. My best Geode NX 1500 (so far) was able to pass 1M at 1.8V and 2300Mhz on air. The worst one did 2100 at 1.8V.
 
My best Geode isn't better. Hope you will get a better Geode in your bin lottery. :d
My Thoroughbred B Durons tends to clock better. But I haven't that many CPU to judge...
 
Well to be exact, my boot tests on my 1750 gave me:
2104MHz 1,525v
2205MHz. 1,650v
2305MHz 1,750v
2405MHz 1,850v
2505MHz 2,000v

But I have to boot these cpu’s like this: First post 7,5 x 133MHz + 1,4v post, then 7x 166MHz and 1,4v, then 7x 200MHz and 1.4v boot, and keep upping 1x multi higher.
 
interesting! I wonder how this helps. Allows this method a higher clock or refuses the CPU to jump high frequency immediately?
I never tried it before.
 
It just refuses to do higher frequency‘s if this order is not being used.
All of my Geode’s need this.

Edit: probably a different order will do as well, just start on a low frequency/fsb.
Edit 2: You guys do look at the color of the die or not?
 
Ahh, I will try it next time. By thinking of this, I remember that I most of the time boot with a low frequency / FSB and raise the FSB in Windows. Maybe this also works in a simmilar way.

I look at the colours of the DIE. I know there is somewhere a guide to it. I forgot the most. From what I remember, high red coloured DIEs clock worse and bluish / greenish DIEs should be better. I hope I didn't mix it up.

edit. maybe this needs statistics?
 
Well I don’t remember it exactly as well I have to admit. But from what I remember it has to be even. And indeed blue would be better although I thought some light red was Ok…
 
My NF-7 doesn't have any issues with this. I just boot at 133x15 (2ghz) and 1.8V and raise FSB via NF2 Xtreme Tweaker. I'm bumping FSB like this: 133,3 -> 140 -> 143 -> 146 -> 150 -> 153 -> 156 -> 160. This translates to 2000 -> 2100 and then 50Mhz steps till 2400. Till now no Geode has reached 2400, two failed 1M at 2350. This is out of 10 Geode i tested. The other 90 are still waiting.
 
100 Geode’s? Wow.
Good to know. I might have tested with my Epox board (have to check). The point was that I could not start them at 1.8GHz right away. First a lower frequency. And a lower fsb was better.
 
Mit LN²/KoKü/Peltier auf der NB wäre ich mal wirklich gespannt, ob man noch richtig was holen kann. Do it (y)
 
Hello everyone, i just registered so this is my first post. I've done some overclocking over the past few years and still do some hardmodding/helping every now and then, mostly for @Sparksnl. It's always a blast working together. I recently saw in the Bastelthread that the concept of a Slotket A adapter was given some attention, this idea has got my attention for a couple of years now and spawned a side project. This project has progressed till a point now that it's serious enough to share with you guys without wasting everyones time.

I've been collecting and studying several Slot A/Socket A CPU and chipset datasheets. The last couple of years i have gone through many revisions and finally i have something that i'm satisfied with:

PCB.png


The adapter fits into Slot A motherboards and accepts Socket A cpu's. For better cooling options, AM4 mounting holes have been added for compact AM4 air coolers and waterblocks. For tweaking, there are dipswitches on the left to set the VID, FID and BP_FID pinstate. There is also one dipswitch that controls the amount of cache on the CPU for Palomino/Throughbred based Athlons/Durons. Once one L9 bridge has been connected on the cpu, it is possible to switch between 64k and 256k cache. Especially handy for unlocking Duron cpu's while easily being able to switch back if the additional cache doesn't function properly. The additional VIA chipset stability caps are integrated into the design as well. It's a 6-layer design where signal integrity was the main focus, all traces have been hand-routed with proper length matching / trace spacing. There is also an additional connector on the top for connecting an additional board that shows CPU temp and Vcore. A bit like a GFD but then without the dipswitches and some extra 7-segs.

I'm expecting to finish the design and order some PCB's in about 2 weeks, the first testing can probably be done in 1~2months i'm hoping. For testing i have the following hardware:
- Asus K7M (AMD 751 chipset) (AMI BIOS)
- MSI K7 Pro (AMD as well) (AMI BIOS)
- MSI MS-6191 (AMD...) (AMI BIOS)
- Epox 7KXA Rev 0.3 (VIA KX133) (AWARD BIOS)

And for some additional reverse-engineering:
- Gigabyte 7IXE4 AMD 751 board with Socket A

The main problem (if the adapter would actually work) would be BIOS support. Luckily i found the Bios Patcher tool that adds additional cpu support to Award and AMI bioses. I tested this tool with a Barton CPU on the 7IXE4 and it did it's job. I was also able to at least patch the K7 and 7KXA bios, but i don't know if the additional CPU support will be there. The boards at least post with the patched bioses.

The second software-hiccup could be the ROMSIP. One important part of this adapter is that the PushPull drivers on the CPU are enabled. For this there is a 1-bit parameter in the ROMSIP called "SysPushPull" that needs to be set to 1. I'm not sure if the Slot A motherboards would do this since the Slot A thunderbirds didn't use their pushpull drivers, they operated in open-drain mode.

Other than that, i'm convinced enough to spend some time and money into this project.
 
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Welcome to the forum! What a first post and what a project! I am sure, that some people are interested in this project.
As far as I can, I will try to help you out. I do and did some BIOS mods, so I am a little familiar to BIOS modding. I never changed a CPU support in a BIOS, though. So this is where I also have to learn/reverse-engineer how it works. The Socket A boards doesn't have Microcodes for the CPUs, the CPU support is done by the bridges on the CPU and via BIOS code.
Since the BIOS patcher seems to work for you, maybe we can use it as a workaround. As far as I know, the patcher adds two files into the BIOS, that contains the additional / new code. I never compared or looked how it exactly works. Maybe Antinomy also can help us out.

The other part with the romsips, I already did a quick look into the BIOS and I didn't find the romsips yet. I guess this needs a deeper look into the BIOS code, probably in the bootblock part.

If I find some time in the next days, I will try to look into the BIOSes.
 
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Welcome aboard @auto660 👍

Looks like a great project as follow-up to your fireRAM project which sparks puts to good use. Also AM4 holes is a great idea to be able to mount modern coolers on slot A.

While i love how much work went into this, i also wonder if it‘s possible to create a reverse adapter. So Slot to socket, not socket to slot. Running slot a CPUs on nforce2 would be insane…
 
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@digitalbath Thank you for wanting to help me out with the bios stuff. I've attempted to understand the AMI and Award bios reverse-engineering guides but it looks like magic for me. The basic AMIBCP/MODBIN stuff is where i draw the line currently. I've made an archive with several Bios Patcher versions together with the neccessary files and different versions of AMIBCP and CBROM that the patcher needs. I also added some instructions for the few that want to try it themselves:
https://drive.google.com/file/d/12LoyRhlPo1-TSyoJSr80lSuwYQprb2Uv/view?usp=share_link
One interesting part of this tool that might be worth looking into is the option to set the boot-up multiplier for Mobile CPU's. Maybe i can send a prototype adapter your way once i have them so you can have a go at it yourself, if you have a Slot A motherboard. Since i have a TL866 programmer, trying out bios mods is no problem for me either.

EDIT: I forgot to mention that the Gigabyte 7IXE4 board makes use of an external SIP which seems to come from a PIC16C505 MCU.

@Tzk This project is quite a step up from the FireRAM indeed and it really made me learn high speed PCB design. A while ago i searched for the FireRAM PCB's to send one your way, unfortunately i can't find them anymore. Sparks currently has the only FireRAM i made, even i don't have one. :rolleyes2: At least he puts it to good use though. I'm planning to do a redesign on it with a 4-layer board instead of the 2-layer board that it currently uses. A reverse socket adapter could be possible if the current adapter works, but it comes with it's own set of challenges and making a good PCB design really eats away my free time. I may give it a go in the future, at least it seems that most of the NF2 boards have the socket roughly in the same spot and orientation so compatibility won't be limited to one board.

I'm planning on making a small website to document these kind of projects and make them available to those who are interested. :-) One of the things i'm also looking into is making a TurboPLL for the older hardware platforms, so there are quite a few project ideas. I just need to have enough free time and resources to make it happen.
 
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One Question: Without much effort, is it possible to build a DDR PCB with these TSOP66 adapters?
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TSOP66 Test Socket Pitch 0.65mm IC Size 11.74*22.74 mm Test Socket Programmer | eBay

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I plundered some defective DDR boards with TCCD or BH-5 and am now trying to select individual chips. However, soldering is quite time consuming.
 
bschicht86 schrieb:
One Question: Without much effort, is it possible to build a DDR PCB with these TSOP66 adapters?
www.ebay.com

TSOP66 Test Socket Pitch 0.65mm IC Size 11.74*22.74 mm Test Socket Programmer | eBay

Find many great new & used options and get the best deals for TSOP66 Test Socket Pitch 0.65mm IC Size 11.74*22.74 mm Test Socket Programmer at the best online prices at eBay! Free shipping for many products!
www.ebay.com

I plundered some defective DDR boards with TCCD or BH-5 and am now trying to select individual chips. However, soldering is quite time consuming.
Zum Vergrößern anklicken....
Making a PCB for it is very possible, but i don't know what those sockets will do to the signal integrity and how sensitive DDR1 is. Maybe it will work for testing at lower speeds but i don't see it working at the ragged edge for binning chips. When designing the PCB, you will probably want to stick to the good practices for high speed PCB design and to the DDR1 reference guide for routing and length matching.

A modified SPD will also be neccessary but you can just read them from comparable DDR modules and edit them with the SPD tool. This tool works fine with Windows XP. The trick is to boot up into Windows with one standard module, put the pc in sleep mode and then add the modified module. Then you pull the pc out of sleep mode, the motherboard won't detect/use the added modified memory module but the SPD tool can reach the SPD EEPROM nonetheless and then you can flash the correct SPD information.
 
auto660 schrieb:
Thank you for wanting to help me out with the bios stuff. I've attempted to understand the AMI and Award bios reverse-engineering guides but it looks like magic for me. The basic AMIBCP/MODBIN stuff is where i draw the line currently. I've made an archive with several Bios Patcher versions together with the neccessary files and different versions of AMIBCP and CBROM that the patcher needs. I also added some instructions for the few that want to try it themselves:
https://drive.google.com/file/d/12LoyRhlPo1-TSyoJSr80lSuwYQprb2Uv/view?usp=share_link
One interesting part of this tool that might be worth looking into is the option to set the boot-up multiplier for Mobile CPU's. Maybe i can send a prototype adapter your way once i have them so you can have a go at it yourself, if you have a Slot A motherboard. Since i have a TL866 programmer, trying out bios mods is no problem for me either.
Zum Vergrößern anklicken....
Thanks for the files! I am sure, that I don't have all versions of the patcher. So I will add the missing versions to my files. This might be helpful to me.

The most part of the basic BIOS modding for AMI / AWARD BIOSes was already reverse-engineered by other people years ago. Thanks to this, we had an easier start with the basic "Socket A BIOS" modding.
The BIOS patcher does more advanced parts in the BIOS. Applerom did a great job with this tool. I have also to mention, that it doesn't work with all BIOSes. I have two boards, where the patcher bricked the BIOS. Maybe I used wrong versions? I should probably retry it.
Changing the bootup Multi should be useful. Not all boards do have an option to change Multi. AWARD BIOSes start with the default / startup Multi and AMI BIOSes tend to start with the max Multi. We should be able change the Multi after the boot though (except NForce chipset).
I do not have any Slot A boards. I also did not plan to buy one. I hope we will be able to test the BIOSes by sending them to you.

auto660 schrieb:
EDIT: I forgot to mention that the Gigabyte 7IXE4 board makes use of an external SIP which seems to come from a PIC16C505 MCU.
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Interesting. I will look into the BIOS. Maybe I can find an usefull part to this.

auto660 schrieb:
The second software-hiccup could be the ROMSIP. One important part of this adapter is that the PushPull drivers on the CPU are enabled. For this there is a 1-bit parameter in the ROMSIP called "SysPushPull" that needs to be set to 1. I'm not sure if the Slot A motherboards would do this since the Slot A thunderbirds didn't use their pushpull drivers, they operated in open-drain mode.
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This is an interesting part, because SysPushPull is a part of the romsips.

1681158263407.png


1681158326311.png


Now, I know, that all Socket A should set this Bit to 1. Looking into the sip table for my SIS board, this bit is always set to 1.
Code: 
=======================================================================
| performance BIOS                                      |
=======================================================================
multi  |  EC OC ED OD AD PP DS DL EX PM AC RO  DM  AM BT| F3 F2 F1 F0 |
=======================================================================
 5.0   | 101 100 10 01 00 1 0 0011 0 1 011 00 011 011 0 | B2 48 D6 36 |
 5.5   | 101 100 10 01 00 1 0 0100 0 1 011 00 011 011 0 | B2 49 16 36 |
 6.0   | 101 100 10 01 00 1 0 0101 0 1 011 00 101 101 0 | B2 49 56 5A |
 6.5   | 101 100 10 01 00 1 0 0110 0 1 011 00 101 101 0 | B2 49 96 5A |
 7.0   | 110 101 10 01 00 1 0 0000 0 1 100 00 101 101 0 | D6 48 18 5A |
 7.5   | 110 101 10 01 00 1 0 0001 0 1 100 00 101 101 0 | D6 48 58 5A |
 8.0   | 110 101 10 01 00 1 0 0001 0 1 100 00 101 101 0 | D6 48 58 5A |
 8.5   | 110 101 10 01 00 1 0 0010 0 1 011 00 101 101 0 | D6 48 98 5A |
 9.0   | 111 110 10 01 00 1 0 0010 0 1 101 00 101 101 0 | FA 48 9A 5A |
 9.5   | 111 110 10 01 00 1 0 0011 0 1 101 00 101 101 0 | FA 48 DA 5A |
10.0   | 111 110 10 01 00 1 0 0011 0 1 101 00 101 101 0 | FA 48 DA 5A |
10.5   | 111 110 10 01 00 1 0 0100 0 1 101 00 101 101 0 | FA 49 1A 5A |
11.0   | 110 111 00 01 00 1 0 0100 0 1 110 00 101 101 0 | DC 49 1C 5A |
=======================================================================
multi  |    F3     |    F2      |    F1     |    F0     |             |
=======================================================================
The Socket A SIS chipset seems to be the only chipset, where the sip values appear in the PCI register. The AMD 761 Chipset does also monitor some sip values, but not all.

Maybe this table will help in searching the SIPs:
AMD recomends this values for AMD751
1681159335935.png
 
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@auto660 Wow, I just take a rare random look into this thread here and immediately see a Slotket-Adapter. Absolutely stunning, what a fantastic project! A few weeks ago I was looking for a SlotKet-Adapter and saw in the datasheets that there is between SlotA & SocketA a different amount of VID numbers, then it was clear to me to build an adapter is far beyond my abilities. Really hope you get this done and ofcourse, welcome to the forum!
 
digitalbath schrieb:
.....
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Hmm, that looks promising. I wasn't even sure the 751 chipset would have a setting for the PushPull bit. Is it a Read/Write bit or a Read Only bit that's hardcoded with a strapping pin on the chipset?

One other thing that could be interesting for reverse-engineering is that Gigabyte based the 7IXE4 Socket A board on their older 7IXE Slot A motherboard. The 7IXE4 board even shows "cache voltage" in the hwmonitor tab. So the bios is probably also at least partial a copy of the 7IXE bios.
7IXE4
7IXE
7IXE_2.jpg
7IXE4.jpg

Testing bioses is no problem of course, i hope that my testing will be enough to develop some working bioses, if the even slotket works of course.
 
auto660 schrieb:
Hmm, that looks promising. I wasn't even sure the 751 chipset would have a setting for the PushPull bit. Is it a Read/Write bit or a Read Only bit that's hardcoded with a strapping pin on the chipset?
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I have no clue how it was solved with the older boards. With the newer Socket A boards, the romsips are integrated into the BIOS. For the NForce2 Chipset, we modify them to get a performance boost or to get a better OC. The newer VIA Chipsets (>KT333?) also have this SIPs integrated into the BIOS. They're located in the bootblock. I didn't find the SIS romsips in the BIOS yet, but they also should be there. ASRock released normal BIOSes and performance BIOSes for their first SIS boards. The difference is mainly the "tighter" SIP values and the unlocked memory settings.
So my guess is that all Socket A and maybe Slot A boards should have SIP values in the BIOS. We need to find them.
I don't think, that we are able to change the SIP values after bootup. Or at least I don't know what command we need to perform to be able to change the timings.
But one thing is probably promising. Every change of the Multi onthefly with a mobile CPU needs to change the SIP timings! Every Multi has its own SysDcDelay timings in this table:
1681248125651.png

As far as I see, all manufacturers used this values for their SIP timings / Multis. You can find this values also in the SIS table under DL.

auto660 schrieb:
One other thing that could be interesting for reverse-engineering is that Gigabyte based the 7IXE4 Socket A board on their older 7IXE Slot A motherboard. The 7IXE4 board even shows "cache voltage" in the hwmonitor tab. So the bios is probably also at least partial a copy of the 7IXE bios.
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This is interesting. Maybe worth to compare the BIOSes for both boards.
 
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