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I used to use the Shamino RTTs that Veii recommended, with an adaptation in the RONs, RTT's 48-34-34--34-34-240-0-0-60-40-40/40-40 and DQVrefUp 172-Down -90
Black Apex, White APEX
Encore's PCB has different characteristics
RTTs on DIMM may work due to Groups
But Groups & RONs are on CPUs side.
So that means through board.
This also means that they can never be tansferable to all ASUS boards or all 1DPC
Groups are an interesting kind, but its still ODT from Mem Controller through PCB to mem slot.
CTL (0,1,2) uses VDDQ as base
RON use VDDQ as base
More hidden timings do that when building VREF
and then RTT controls access to ICs , subchannels and bankgroups based on what it receives. A differential signal.
There is unfortunately no way how you can reuse that data. But maybe the meaning of information can be transfered.
As for the rest of the Post, its too many questions to answer right now.
Disable VDDQ Training and start to look for your actual voltage target.
Update to bios 0081 , remove all PLLs and probably move near 170mV delta between VDDQ_CPU to VDDQ_MEM
Keep VDD2 bellow and max equal to VDD_MEM. Keep VDDQ_CPU min-equal or above SA.
Don't use strong IA_AC_LL as that will limit maximum range of IMC.
All is loadaware and voltage sheduled. Nearly all voltages are either VID or IVR. Aka loadblanced.
Cutting supply is harming all of them together.
Making more margins by working with V/F curve an undervolting cores ~ is the way to go. No supply cutting
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Good morning @Veii
I have a little time to work further on the mem OC.
Wanted to use the 8533 as a base for 8600 with the 48/40-40/48 RON config and the 1.24 V VDDQ_CPU base, but that is too low for this speed, can't even run a cycle in Y.
So I raised the TX to 1.30V, it ran few cycles before error, but got error 13 in 10 minutes in TM5, so bumped SA to 1.22V.
It ran 10 minutes again in Y and error, so TM5 started again. Got error 4 very soon.
Bumped VDD (I know error 4 is overvoltage / overcurrent, but could be an RTT issue too) to 1.65V and now it ran 10 minutes Y again and TM5 finished 10 cycles already (still running)
So currently the base is:
SA: 1.22V
VDD2: 1.493V
VDD_MEM: 1.65V
VDDQ_MEM: 1.47V
VDDQ_CPU: 1.30V
In the meantime I wanted to check my timings and saw that you reduced the recommended TWR to 12 in tRFC mini. Should I lower it too?
If I lower it, should I lower WTR too? Or is it not affected?
What is promising I restarted and retrained several times and Y was always ran some cycles.
Maybe I should raise the VDD2 a little bit.
Still no RX-DFE, or VTT playing.
For fun In trained a 8800 profile, but it spammed error 0 in some seconds and got freeze. I am afraid 8800 will be unreachable on my current config, but a nice and tight 8600C36 is still possible.
Edit:
Error 3 and error 0 came in the 60th minute.
I want to loosen the tRFC and tXSR, should be too tight.
Ideal für schnelle Kühlung bei hohen CPU-Temperaturen, erfordert jedoch Vorsicht bei der Anwendung (siehe beiliegende Gebrauchsanweisung). Elektrisch leitfähig! Große CPUs (LGA 20xx, TR4, Server): ca. 1g für 1-2 Anwendungen, 2g für 2-4 Anwendungen, 5g für 5-10 Anwendungen.
Ideal für schnelle Kühlung bei hohen CPU-Temperaturen, erfordert jedoch Vorsicht bei der Anwendung (siehe beiliegende Gebrauchsanweisung). Elektrisch leitfähig! Große CPUs (LGA 20xx, TR4, Server): ca. 1g für 1-2 Anwendungen, 2g für 2-4 Anwendungen, 5g für 5-10 Anwendungen.
Explore the Thermal Hero Product Page today and discover our top-of-the-line thermal paste, thermal pad and compound products for optimal heat dissipation!
thermalhero.com
For about 50% less than TG LM it should be worth a try, but sb has to try it.
Explore the Thermal Hero Product Page today and discover our top-of-the-line thermal paste, thermal pad and compound products for optimal heat dissipation!
thermalhero.com
For about 50% less than TG LM it should be worth a try, but sb has to try it.
Verschluss, einen Applikator, zwei Desinfektionspads sowie zwei Wattestäbchen. Terra Liquid. nicht geeignet für die Anwendung mit Aluminium. Aufgrund der hohen benetzenden Eigenschaften, vorsichtiger Umgang.
Verschluss, einen Applikator, zwei Desinfektionspads sowie zwei Wattestäbchen. Terra Liquid. nicht geeignet für die Anwendung mit Aluminium. Aufgrund der hohen benetzenden Eigenschaften, vorsichtiger Umgang.
That is true, but after reapplying it 2-3 times, it will be okay. Gallium "eats" itself into the block, but after several times, it's okay. I have installed the block about 3-4 months ago and the temps are still very good, but in the first times I had to reapply it several times. Also I like to polish it before reinstalling the block.
It's not a biggie. It will eat every nickel, sooner or later you have to reapply it, no matter which DD block you have. It even absorbs itself to the ILM.
You can apply LM on the Iceman block before mounting, wait a few days, clean it, reapply, clean it and install the block.
That's why I have QD3 on every block, much easier to maintain my loop without draining the coolant.
Habe LN auch schon auf vernickelten coldplates als TIM genutzt, selbst nach Monaten war das niemals so ausgeprägt wie beim Iceman anscheinend bereits nach kurzer Zeit.
Da wäre mir dann selbst blankes Kupfer als Oberfläche lieber ...
Ist ja nicht der CPU Thread aber beim Supercool habe ich bisher keine Probleme gehabt (Conductonaut). Würde gerne noch CyberBlood Mk.1/Mk.2 ausprobieren.
Ist ja nicht der CPU Thread aber beim Supercool habe ich bisher keine Probleme gehabt (Conductonaut). Würde gerne noch CyberBlood Mk.1/Mk.2 ausprobieren.
JA wenn Freeze ist, kann ich kein Bild mehr machen. Wenn dann vorher. Freeze tritt oft bei min2 oder min8 ein.
Errors hatte ich zwei mal, da hab ich kein Pic gemacht. Versuche es nochmal.Screenshots von hwinfo und tm5?
Ja knapp, 127.40 Euro inkl.
Genau dieser Händler hat dann 1-2 Tage später den selben Bin nochmal angeboten, für 5-6 Euro weniger. Da konnte ich dann aber widerstehen.
Liquid Metal ≠ Liquid Metal
TG Conductonaut is a 3 parts mixture
Conductonaut Extr is a 2 parts mixture.
Conduc-Extr is outperforming due to viscosity change and the absent of another mixture.
PTM7950 is a phasechange pad that needs high pressure !
Not very fitting for a bare crystal, fine for a reworked thin IHS with padding on the sides.
Used by Lenovo & AMD now ~ on hot spaces, but doesnt shine till much pressure is applied.
Gallium is not everything.
Thermal Conductivity means equally nothing.
Chemical mixture matters.
PTM Vs LM work is to fill cavities.
One does it by pressure. Another does it by being oil like fluid.
Oil like fluid does slowly but surely destroy the surface it sits on.
Crystal + waterblock & is also victim to gravity. PumpOut.
Paste looses not because of thermal conductivity, but because of cavity filling ability.
A liquid fluid which makes no perfect contact, is as if not more worthless than any other substrate that fills the delta.
Air is an insulator. A very good one.
The higher the height of the material, the more thermal transfer resistance starts to matter.
Two flat surfaces can bound together by what is called "ringing"
In optical industry/crystal this is called "Optical Contact Bonding"
In engineering industry this is called ringing. Similar concept, slightly different approach.
OCB doesn't need any fluid whatsoever to bind on molecular level.
I recommend strongly to watch
Timestamp 09:45 & 21:10 ~ whole video is recommended to be honest.
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Graphite Pads up to manufacturing may cover ~150microns of height.
Well lets make it 100 +50, 200 -50, microns. All relative really.
Its hard to slice it very thin without destroying atom structure and causing it to crack.
Kryosheet is 0.2mm , same as PTM = 200 microns.
Of course i have no idea about his exact specifications, if that thing can be compressed any further than down to 120micron
But i expect it to sit there 120-150microns due to my bare minimum, novice knowledge on this material.
Paste can fill cavities near 200 microns, where afterwards you are better off with putty or thermal pads.
Because paste has also range of thermal resistance/z-axis (height). Every thermal material has. Every metal has.
Soo because of that, if you can't even get it anywhere near sub 100 microns, liquid metal will always be the worst option.
Outside its material destructive properties, or its gravity flow-away properties.
How to notice distance:
if a normal slice of paper , the thinnest you can get (~110micron) fits and can be pulled away with force
// normal grocery store invoices use thin paper.
Your cooler will never have the required distance for any fluid substance to outperform graphite.
If you can rotate your paper, your parts are not flat enough and only make pinpoint contact.
And if you screw in sideways and your frame is not exactly at the height of the crystal
You can either crack the crystal or have unmeasured height distance of over 100 microns = fluid is useless
Because all of this,
Go with a material that dampens pressure, the kryosheet
And lap all your surfaces
Never trust random manufacturing.
At least you won't have a high chance to crack crystal with a dampening material + spare life of both Crystal & Block.
Also wer nicht mal so viel Eigeninitiative hat, sich mal über die grundlegenden Dinge wie Stabilitätstests zu informieren oder auf den Eingangpost dieses oder des Intel DDR4 Threads zu schauen, dem ist auch nicht zu helfen. Ich hab mir meine Kenntnisse und Fähigkeiten über die letzten Jahre...
Also wer nicht mal so viel Eigeninitiative hat, sich mal über die grundlegenden Dinge wie Stabilitätstests zu informieren oder auf den Eingangpost dieses oder des Intel DDR4 Threads zu schauen, dem ist auch nicht zu helfen. Ich hab mir meine Kenntnisse und Fähigkeiten über die letzten Jahre...
www.hardwareluxx.de
Or let a professional do it for you ~ seriously.
Reason to go direct-die is not recommended with half-hearted approach.
Difficult work with tight tolerances.
Either do it right or don't bother with non-designed waterblocks for it.
XYZ user already will mess up height distance. Because there are no trustful die-guard frames to begin with.
You can't eyeball this. You need to measure.
Liquid metal is equally silly.
But i've commented enough
Good luck~
EDIT:
Before i forget,
A delided CPU, still has indium on it.
Use a mixture that disolves it.
Cutting it away or scraping it away, equally introduces cavities.
The core thing that you try to combat with thermal material swap.
Don't make the problem worse. LM will also etch into the surface.
You want a shiny surface for good contact. Optimally where cpu is held by surface tension only. (ringing)
Hab den Speicher jetzt auf meinem Strix.. und auch wieder den 14600kf drin, damit ich mehr als 7200 testen kann. Ist mit 8400 beim 32m aber auch schon an der Kotzgrenze.
Good morning @Veii
I have a little time to work further on the mem OC.
Wanted to use the 8533 as a base for 8600 with the 48/40-40/48 RON config and the 1.24 V VDDQ_CPU base, but that is too low for this speed, can't even run a cycle in Y.
So I raised the TX to 1.30V, it ran few cycles before error, but got error 13 in 10 minutes in TM5, so bumped SA to 1.22V.
It ran 10 minutes again in Y and error, so TM5 started again. Got error 4 very soon.
Bumped VDD (I know error 4 is overvoltage / overcurrent, but could be an RTT issue too) to 1.65V and now it ran 10 minutes Y again and TM5 finished 10 cycles already (still running)
So currently the base is:
SA: 1.22V
VDD2: 1.493V
VDD_MEM: 1.65V
VDDQ_MEM: 1.47V
VDDQ_CPU: 1.30V
Hey hey
Can you refresh my mind a bit. Its been many pages.
We were working before with 225mV delta or ?
Your foundation looks alright.
If it works that will be good
But i'm a bit worried you'll need to settle to 40-34-34-40 at the end with more delta.
Or 48-40-40-48 with less delta.
On this "trains with errors" topic
We are on manual DQ Vref or auto.
There remains a chance that floor (down) has shifted a bit with recent bios changes. But i kind of think it should be fine. If ASUS Team followed my changes, or build ontop of them ~ it should remain fine.
Soo we work with or without CTL0 ?
You know VDDQ change messes all up.
It will also do so on RON.
60mV change on VDDQ is huge.
There is no more playroom on it like it was with training.
Steps of 5-10mV, not steps of 60mV.
5mV will already show a difference between stable or hardfail.
15mV is when it will or wont train anymore.
Weakening ODT and then running RONs weak, wont bring you far.
Although report already was overcurrent crash.
As long as you have it working its ok.
If it can be called progress, unsure.
May need to just have strengthen RON and it could be ok.
In the meantime I wanted to check my timings and saw that you reduced the recommended TWR to 12 in tRFC mini. Should I lower it too?
If I lower it, should I lower WTR too? Or is it not affected?
It wasnt me.
People love to mess with the sheet and also mess it up
Part of people.
Keep your timings. The moment you notice 7 & 8s , then we have write alignment issues
Yes WR >/= WTRL, till approach of writes on CPU side change.
They did already, hence Board defaults to WR 8? or 6
With WTR_ 4-18.
But i like to stick to old good known.
There needs no change to happen.
For fun I've trained a 8800 profile, but it spammed error 0 in some seconds and got freeze. I am afraid 8800 will be unreachable on my current config, but a nice and tight 8600C36 is still possible.
You maybe overthink or overworry.
We know IA supply needs increase on higher clock.
Lets not forget.
Let me remind you that you also just change 30% of the available options.
I dont want you to be accidentally flooded by sideissues and new rabbit holes
Keep working hard, and there is muh stuff to do for more clock.
Its not the time to give up, just because it has gotten difficult
@Veii whats the difference between fixed vcore + LLC at static clocks vs default dynamic clocks and auto voltage in terms of ram OC. How does auto voltage help RAM? Like if I used a low acll for undervolt how is that better than manual core + LLC?
Ja knapp, 127.40 Euro inkl.
Genau dieser Händler hat dann 1-2 Tage später den selben Bin nochmal angeboten, für 5-6 Euro weniger. Da konnte ich dann aber widerstehen.
Ist mit 8400 beim 32m aber auch schon an der Kotzgrenze.
