[Sammelthread] Intel DDR5 RAM OC Thread

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Komisch. Ich konnte mit V/F -50mV Offset geben. Ich bin kein Profi, aber es ging. OK, tested nur 5 Minute, aber wenn ich Global SVID Adaptive Offset nutze, es ist nicht moeglich. Unter 1.15V Crash.
AC LL 0.01, DC LL auto, LLC auto (4) und V/F -50mV, =1.117V unter VT3 load. Nicht egal, dass es 245W, oder 275W.
Ich werde dann spaeter weiter spielen, aber ich glaube mehr offset unmoeglich fuer meinen cpu.

So ist eingestellt:

2C 58x, 4C 57x, 6C 56x 8C 55x P
44x alle E Core
49x ist max Ring

Ich habe ein 1200W Spike gehabt... jetzt ich schaue, das Fenster verdekt..., sorry, nicht gesehen vorher.
Ganze Software kenne ich nicht, froh, dass ich es geschafft hab.

Braegnok, danke dir. Untrer W11 nicht funkzioniert, aber aufm W10 gehts.
 

Anhänge

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Braegnok, danke dir. Untrer W11 nicht funkzioniert, aber aufm W10 gehts.
Core/memory isolation (antivirus) muss aus
Funktioniert gut.

Y-Cruncher SFT fürs core voltage testing.
Global SVID = Trained.
50mV ≠ 50mV

Du verschiebst die Kurve.
5800 punkt 8 peakt höher als Punkt 9-11
Punkt 9-11 wird somit ignoriert.
So ist eingestellt:

2C 58x, 4C 57x, 6C 56x 8C 55x P
44x alle E Core
49x ist max Ring
Auto und TVB verwenden
Kein fixierter clock und keine fixierte Spannung.
Ring ebenfalls auto

Hwinfo stört ASUS Tool.
Hat aus zu sein.
Beitrag automatisch zusammengeführt:

0.3
0.0X ist zu tief
 
Zuletzt bearbeitet:
Ich habe für mein z790 AORUS Master ein Corsair titanium 64 GB 6600 Kit geholt und nutze eine 13700k CPU

Meint ihr der Speicher lässt sich auf 7200 MHz übertragen?

Bzw hat wer Erfahrungen welche timing super laufe

Aktuell habe ich noch ein 32GB Kingston 7200 Kit verbaut mit cl34 Setting
 
Core/memory isolation (antivirus) muss aus
Funktioniert gut.

Y-Cruncher SFT fürs core voltage testing.
Global SVID = Trained.
50mV ≠ 50mV

Du verschiebst die Kurve.
5800 punkt 8 peakt höher als Punkt 9-11
Punkt 9-11 wird somit ignoriert.

Auto und TVB verwenden
Kein fixierter clock und keine fixierte Spannung.
Ring ebenfalls auto

Hwinfo stört ASUS Tool.
Hat aus zu sein.
Beitrag automatisch zusammengeführt:


0.3
0.0X ist zu tief
- Global SVID = Trained.
- Y-Cruncher SFT
- Auto und TVB verwenden // TVB habe ich vergessen, aber wir brauchen es nicht so wie so
- Kein fixierter clock und keine fixierte Spannung. // Ich nutze nie fix Freq und Spannung. 14900k allcore 5700MHz, und 2 o. 3 Kerne 60x. Es wird nie in Leben mit mein 6C Wasser gehen. Deswegen mache ich downclock, max 55x allcore P. Ich will kein 5700MHz, gut wenn es 5500 schafft.
-
Ring ebenfalls auto // Ich habe es auch vergessen, aber es ist auch downclock. 8-50x ist default, bei mir ist 8-49.

Jetzt ich versuche irgenwie offset zu finden, aber SFT ich glaube keine Chance.

[2024/01/07 00:53:33]
Ai Overclock Tuner [Auto]
Intel(R) Adaptive Boost Technology [Auto]
ASUS MultiCore Enhancement [Auto – Lets BIOS Optimize]
SVID Behavior [Trained]
BCLK Frequency : DRAM Frequency Ratio [100:100]
Memory Controller : DRAM Frequency Ratio [1:2]
DRAM Frequency [DDR5-7200MHz]
Performance Core Ratio [Auto]
Performance Core0 Specific Ratio Limit [Auto]
Performance Core0 specific Voltage [Auto]
Performance Core1 Specific Ratio Limit [Auto]
Performance Core1 specific Voltage [Auto]
*Performance Core2 Specific Ratio Limit [Auto]
Performance Core2 specific Voltage [Auto]
*Performance Core3 Specific Ratio Limit [Auto]
Performance Core3 specific Voltage [Auto]
Performance Core4 Specific Ratio Limit [Auto]
Performance Core4 specific Voltage [Auto]
Performance Core5 Specific Ratio Limit [Auto]
Performance Core5 specific Voltage [Auto]
Performance Core6 Specific Ratio Limit [Auto]
Performance Core6 specific Voltage [Auto]
Performance Core7 Specific Ratio Limit [Auto]
Performance Core7 specific Voltage [Auto]
Efficient Core Ratio [Auto]
Efficient Core Group0 Specific Ratio Limit [Auto]
Efficient Core Group0 specific Voltage [Auto]
Efficient Core Group1 Specific Ratio Limit [Auto]
Efficient Core Group1 specific Voltage [Auto]
Efficient Core Group2 Specific Ratio Limit [Auto]
Efficient Core Group2 specific Voltage [Auto]
Efficient Core Group3 Specific Ratio Limit [Auto]
Efficient Core Group3 specific Voltage [Auto]
AVX2 [Auto]
AVX2 Ratio Offset to per-core Ratio Limit [Auto]
AVX2 Voltage Guardband Scale Factor [Auto]
Maximus Tweak [Mode 2]
DRAM CAS# Latency [32]
DRAM RAS# to CAS# Delay Read [42]
DRAM RAS# to CAS# Delay Write [16]
DRAM RAS# PRE Time [42]
DRAM RAS# ACT Time [54]
DRAM Command Rate [2N]
DRAM RAS# to RAS# Delay L [12]
DRAM RAS# to RAS# Delay S [8]
DRAM REF Cycle Time 2 [448]
DRAM REF Cycle Time Same Bank [Auto]
DRAM Refresh Interval [131071]
DRAM WRITE Recovery Time [24]
DRAM READ to PRE Time [12]
DRAM FOUR ACT WIN Time [32]
DRAM WRITE to READ Delay L [24]
DRAM WRITE to READ Delay S [10]
DRAM CKE Minimum Pulse Width [Auto]
DRAM Write Latency [30]
Ctl0 dqvrefup [154]
Ctl0 dqvrefdn [72]
Ctl0 dqodtvrefup [Auto]
Ctl0 dqodtvrefdn [Auto]
Ctl1 cmdvrefup [Auto]
Ctl1 ctlvrefup [Auto]
Ctl1 clkvrefup [Auto]
Ctl1 ckecsvrefup [Auto]
Ctl2 cmdvrefdn [Auto]
Ctl2 ctlvrefdn [Auto]
Ctl2 clkvrefdn [Auto]
Read Equalization RxEq Start Sign [-]
Read Equalization RxEq Start [Auto]
Read Equalization RxEq Stop Sign [-]
Read Equalization RxEq Stop [Auto]
ODT_READ_DURATION [Auto]
ODT_READ_DELAY [Auto]
ODT_WRITE_DURATION [Auto]
ODT_WRITE_DELAY [Auto]
DQ RTT WR [40 DRAM Clock]
DQ RTT NOM RD [40 DRAM Clock]
DQ RTT NOM WR [40 DRAM Clock]
DQ RTT PARK [34 DRAM Clock]
DQ RTT PARK DQS [34 DRAM Clock]
GroupA CA ODT [240 DRAM Clock]
GroupA CS ODT [0 DRAM Clock]
GroupA CK ODT [0 DRAM Clock]
GroupB CA ODT [60 DRAM Clock]
GroupB CS ODT [40 DRAM Clock]
GroupB CK ODT [40 DRAM Clock]
Pull-up Output Driver Impedance [34 DRAM Clock]
Pull-Down Output Driver Impedance [34 DRAM Clock]
DQ RTT WR [40 DRAM Clock]
DQ RTT NOM RD [40 DRAM Clock]
DQ RTT NOM WR [40 DRAM Clock]
DQ RTT PARK [34 DRAM Clock]
DQ RTT PARK DQS [34 DRAM Clock]
GroupA CA ODT [240 DRAM Clock]
GroupA CS ODT [0 DRAM Clock]
GroupA CK ODT [0 DRAM Clock]
GroupB CA ODT [60 DRAM Clock]
GroupB CS ODT [40 DRAM Clock]
GroupB CK ODT [40 DRAM Clock]
Pull-up Output Driver Impedance [34 DRAM Clock]
Pull-Down Output Driver Impedance [34 DRAM Clock]
Round Trip Latency Init Value MC0 CHA [Auto]
Round Trip Latency Max Value MC0 CHA [Auto]
Round Trip Latency Offset Value Mode Sign MC0 CHA [-]
Round Trip Latency Offset Value MC0 CHA [Auto]
Round Trip Latency Init Value MC0 CHB [Auto]
Round Trip Latency Max Value MC0 CHB [Auto]
Round Trip Latency Offset Value Mode Sign MC0 CHB [-]
Round Trip Latency Offset Value MC0 CHB [Auto]
Round Trip Latency Init Value MC1 CHA [Auto]
Round Trip Latency Max Value MC1 CHA [Auto]
Round Trip Latency Offset Value Mode Sign MC1 CHA [-]
Round Trip Latency Offset Value MC1 CHA [Auto]
Round Trip Latency Init Value MC1 CHB [Auto]
Round Trip Latency Max Value MC1 CHB [Auto]
Round Trip Latency Offset Value Mode Sign MC1 CHB [-]
Round Trip Latency Offset Value MC1 CHB [Auto]
Round Trip Latency MC0 CHA R0 [Auto]
Round Trip Latency MC0 CHA R1 [Auto]
Round Trip Latency MC0 CHA R2 [0]
Round Trip Latency MC0 CHA R3 [0]
Round Trip Latency MC0 CHA R4 [0]
Round Trip Latency MC0 CHA R5 [0]
Round Trip Latency MC0 CHA R6 [0]
Round Trip Latency MC0 CHA R7 [0]
Round Trip Latency MC0 CHB R0 [Auto]
Round Trip Latency MC0 CHB R1 [Auto]
Round Trip Latency MC0 CHB R2 [0]
Round Trip Latency MC0 CHB R3 [0]
Round Trip Latency MC0 CHB R4 [0]
Round Trip Latency MC0 CHB R5 [0]
Round Trip Latency MC0 CHB R6 [0]
Round Trip Latency MC0 CHB R7 [0]
Round Trip Latency MC1 CHA R0 [Auto]
Round Trip Latency MC1 CHA R1 [Auto]
Round Trip Latency MC1 CHA R2 [0]
Round Trip Latency MC1 CHA R3 [0]
Round Trip Latency MC1 CHA R4 [0]
Round Trip Latency MC1 CHA R5 [0]
Round Trip Latency MC1 CHA R6 [0]
Round Trip Latency MC1 CHA R7 [0]
Round Trip Latency MC1 CHB R0 [Auto]
Round Trip Latency MC1 CHB R1 [Auto]
Round Trip Latency MC1 CHB R2 [0]
Round Trip Latency MC1 CHB R3 [0]
Round Trip Latency MC1 CHB R4 [0]
Round Trip Latency MC1 CHB R5 [0]
Round Trip Latency MC1 CHB R6 [0]
Round Trip Latency MC1 CHB R7 [0]
Early Command Training [Auto]
SenseAmp Offset Training [Auto]
Early ReadMPR Timing Centering 2D [Auto]
Read MPR Training [Auto]
Receive Enable Training [Auto]
Jedec Write Leveling [Auto]
Early Write Time Centering 2D [Auto]
Early Read Time Centering 2D [Auto]
Write Timing Centering 1D [Auto]
Write Voltage Centering 1D [Auto]
Read Timing Centering 1D [Auto]
Read Timing Centering with JR [Auto]
Dimm ODT Training* [Disabled]
Max RTT_WR [ODT Off]
DIMM RON Training* [Disabled]
Write Drive Strength/Equalization 2D* [Auto]
Write Slew Rate Training* [Auto]
Read ODT Training* [Disabled]
Comp Optimization Training [Auto]
Read Equalization Training* [Auto]
Read Amplifier Training* [Auto]
Write Timing Centering 2D [Auto]
Read Timing Centering 2D [Auto]
Command Voltage Centering [Auto]
Early Command Voltage Centering [Auto]
Write Voltage Centering 2D [Auto]
Read Voltage Centering 2D [Auto]
Late Command Training [Auto]
Round Trip Latency [Auto]
Turn Around Timing Training [Auto]
CMD CTL CLK Slew Rate [Auto]
CMD/CTL DS & E 2D [Auto]
Read Voltage Centering 1D [Auto]
TxDqTCO Comp Training* [Auto]
ClkTCO Comp Training* [Auto]
TxDqsTCO Comp Training* [Auto]
VccDLL Bypass Training [Auto]
CMD/CTL Drive Strength Up/Dn 2D [Auto]
DIMM CA ODT Training [Auto]
PanicVttDnLp Training* [Auto]
Read Vref Decap Training* [Auto]
Vddq Training [Disabled]
Duty Cycle Correction Training [Auto]
Periodic DCC [Auto]
Rank Margin Tool Per Bit [Auto]
DIMM DFE Training [Auto]
EARLY DIMM DFE Training [Auto]
Tx Dqs Dcc Training [Auto]
DRAM DCA Training [Auto]
Write Driver Strength Training [Auto]
Rank Margin Tool [Auto]
Memory Test [Auto]
DIMM SPD Alias Test [Auto]
Receive Enable Centering 1D [Auto]
Retrain Margin Check [Auto]
Write Drive Strength Up/Dn independently [Auto]
LPDDR DqDqs Re-Training [Auto]
Margin Check Limit [Disabled]
tRDRD_sg_Training [Auto]
tRDRD_sg_Runtime [16]
tRDRD_dg_Training [Auto]
tRDRD_dg_Runtime [8]
tRDWR_sg [18]
tRDWR_dg [18]
tWRWR_sg [16]
tWRWR_dg [8]
tWRRD_sg [Auto]
tWRRD_dg [Auto]
tRDRD_dr [0]
tRDRD_dd [Auto]
tRDWR_dr [0]
tRDWR_dd [Auto]
tWRWR_dr [0]
tWRWR_dd [Auto]
tWRRD_dr [0]
tWRRD_dd [Auto]
tRPRE [Auto]
tWPRE [Auto]
tWPOST [Auto]
tWRPRE [Auto]
tPRPDEN [Auto]
tRDPDEN [Auto]
tWRPDEN [Auto]
tCPDED [Auto]
tREFIX9 [Auto]
Ref Interval [Auto]
tXPDLL [Auto]
tXP [Auto]
tPPD [Auto]
tCCD_L_tDLLK [Auto]
tZQCAL [Auto]
tZQCS [Auto]
OREF_RI [Auto]
Refresh Watermarks [High]
Refresh Hp Wm [Auto]
Refresh Panic Wm [Auto]
Refresh Abr Release [Auto]
tXSDLL [Auto]
tZQOPER [Auto]
tMOD [Auto]
CounttREFIWhileRefEn [Auto]
HPRefOnMRS [Auto]
SRX Ref Debits [Auto]
RAISE BLK WAIT [Auto]
Ref Stagger En [Auto]
Ref Stagger Mode [Auto]
Disable Stolen Refresh [Auto]
En Ref Type Display [Auto]
Trefipulse Stagger Disable [Auto]
tRPab ext [Auto]
derating ext [Auto]
Allow 2cyc B2B LPDDR [Auto]
tCSH [Auto]
tCSL [Auto]
powerdown Enable [Auto]
idle length [Auto]
raise cke after exit latency [Auto]
powerdown latency [Auto]
powerdown length [Auto]
selfrefresh latency [Auto]
selfrefresh length [Auto]
ckevalid length [Auto]
ckevalid enable [Auto]
idle enable [Auto]
selfrefresh enable [Auto]
Address mirror [Auto]
no gear4 param divide [Auto]
x8 device [Auto]
no gear2 param divide [Auto]
ddr 1dpc split ranks on subch [Auto]
write0 enable [Auto]
MultiCycCmd [Auto]
WCKDiffLowInIdle [Auto]
PBR Disable [Auto]
PBR OOO Dis [Auto]
PBR Disable on hot [Auto]
PBR Exit on Idle Cnt [Auto]
tXSR [Auto]
Dec tCWL [Auto]
Add tCWL [Auto]
Add 1Qclk delay [Auto]
MRC Fast Boot [Disabled]
MCH Full Check [Auto]
Mem Over Clock Fail Count [2]
Training Profile [Auto]
RxDfe [Auto]
Mrc Training Loop Count [2]
DRAM CLK Period [Auto]
Dll_bwsel [Auto]
Controller 0, Channel 0 Control [Enabled]
Controller 0, Channel 1 Control [Enabled]
Controller 1, Channel 0 Control [Enabled]
Controller 1, Channel 1 Control [Enabled]
MC_Vref0 [Auto]
MC_Vref1 [Auto]
MC_Vref2 [Auto]
Fine Granularity Refresh mode [Auto]
SDRAM Density Per Die [Auto]
SDRAM Banks Per Bank Group [Auto]
SDRAM Bank Groups [Auto]
Dynamic Memory Boost [Disabled]
Realtime Memory Frequency [Disabled]
SA GV [Disabled]
Voltage Monitor [Die Sense]
VRM Initialization Check [Enabled]
CPU Input Voltage Load-line Calibration [Auto]
CPU Load-line Calibration [Auto]
Synch ACDC Loadline with VRM Loadline [Disabled]
CPU Current Capability [Auto]
CPU Current Reporting [Auto]
Core Voltage Suspension [Auto]
CPU VRM Switching Frequency [Auto]
VRM Spread Spectrum [Auto]
CPU Power Duty Control [Auto]
CPU Power Phase Control [Auto]
CPU Power Thermal Control [125]
CPU Core/Cache Boot Voltage [Auto]
CPU Input Boot Voltage [Auto]
PLL Termination Boot Voltage [Auto]
CPU Standby Boot Voltage [Auto]
Memory Controller Boot Voltage [Auto]
CPU Core Auto Voltage Cap [Auto]
CPU Input Auto Voltage Cap [Auto]
Memory Controller Auto Voltage Cap [Auto]
Maximum CPU Core Temperature [95]
Fast Throttle Threshold [Auto]
Package Temperature Threshold [Auto]
Regulate Frequency by above Threshold [Auto]
IVR Transmitter VDDQ ICCMAX [Auto]
Unlimited ICCMAX [Auto]
CPU Core/Cache Current Limit Max. [Auto]
Long Duration Package Power Limit [300]
Package Power Time Window [Auto]
Short Duration Package Power Limit [325]
Dual Tau Boost [Disabled]
IA AC Load Line [0.30]
IA DC Load Line [Auto]
IA CEP Enable [Disabled]
SA CEP Enable [Disabled]
IA SoC Iccmax Reactive Protector [Auto]
Inverse Temperature Dependency Throttle [Auto]
IA VR Voltage Limit [1650]
CPU SVID Support [Auto]
Cache Dynamic OC Switcher [Disabled]
TVB Voltage Optimizations [Disabled]
Enhanced TVB [Disabled]
Overclocking TVB [Disabled]
Overclocking TVB Global Temperature Offset Sign [+]
Overclocking TVB Global Temperature Offset Value [Auto]
Offset Mode Sign 1 [+]
V/F Point 1 Offset [Auto]
Offset Mode Sign 2 [+]
V/F Point 2 Offset [Auto]
Offset Mode Sign 3 [+]
V/F Point 3 Offset [Auto]
Offset Mode Sign 4 [+]
V/F Point 4 Offset [Auto]
Offset Mode Sign 5 [-]
V/F Point 5 Offset [0.01000]
Offset Mode Sign 6 [-]
V/F Point 6 Offset [0.02000]
Offset Mode Sign 7 [-]
V/F Point 7 Offset [0.02000]
Offset Mode Sign 8 [-]
V/F Point 8 Offset [0.02000]
Offset Mode Sign 9 [-]
V/F Point 9 Offset [0.05000]
Offset Mode Sign 10 [-]
V/F Point 10 Offset [0.05000]
Offset Mode Sign 11 [-]
V/F Point 11 Offset [0.05000]
Initial BCLK Frequency [Auto]
Runtime BCLK OC [Auto]
BCLK Amplitude [Auto]
BCLK Slew Rate [Auto]
BCLK Spread Spectrum [Auto]
Initial PCIE Frequency [Auto]
PCIE/DMI Amplitude [Auto]
PCIE/DMI Slew Rate [Auto]
PCIE/DMI Spread Spectrum [Auto]
Cold Boot PCIE Frequency [Auto]
Realtime Memory Timing [Disabled]
SPD Write Disable [TRUE]
PVD Ratio Threshold [Auto]
SA PLL Frequency Override [Auto]
BCLK TSC HW Fixup [Enabled]
Core Ratio Extension Mode [Disabled]
FLL OC mode [Auto]
UnderVolt Protection [Disabled]
Switch Microcode [Current Microcode]
Xtreme Tweaking [Disabled]
Core PLL Voltage [Auto]
GT PLL Voltage [Auto]
Ring PLL Voltage [Auto]
System Agent PLL Voltage [Auto]
Memory Controller PLL Voltage [Auto]
Efficient-core PLL Voltage [Auto]
CPU 1.8V Small Rail [Auto]
PLL Termination Voltage [Auto]
CPU Standby Voltage [Auto]
PCH 1.05V Voltage [Auto]
PCH 0.82V Voltage [Auto]
CPU Input Voltage Reset Voltage [Auto]
Eventual CPU Input Voltage [Auto]
Eventual Memory Controller Voltage [Auto]
Package Temperature Threshold [Auto]
Regulate Frequency by above Threshold [Auto]
Cooler Efficiency Customize [Keep Training]
Cooler Re-evaluation Algorithm [Normal]
Optimism Scale [100]
Ring Down Bin [Auto]
Min. CPU Cache Ratio [Auto]
Max. CPU Cache Ratio [49]
BCLK Aware Adaptive Voltage [Auto]
Actual VRM Core Voltage [Auto]
Global Core SVID Voltage [Auto]
Cache SVID Voltage [Auto]
CPU L2 Voltage [Auto]
CPU System Agent Voltage [Manual Mode]
- CPU System Agent Voltage Override [1.12000]
CPU Input Voltage [Auto]
High DRAM Voltage Mode [Enabled]
DRAM VDD Voltage [1.45000]
DRAM VDDQ Voltage [1.43000]
IVR Transmitter VDDQ Voltage [1.24000]
Memory Controller Voltage [1.21250]
MC Voltage Calculation Voltage Base [Auto]
VDD Calculation Voltage Base [Auto]
PMIC Voltages [Auto]
PCI Express Native Power Management [Enabled]
Native ASPM [Disabled]
DMI Link ASPM Control [Disabled]
ASPM [Auto]
L1 Substates [Disabled]
DMI ASPM [Disabled]
DMI Gen3 ASPM [Disabled]
PEG - ASPM [Disabled]
PCI Express Clock Gating [Enabled]
Hardware Prefetcher [Enabled]
Adjacent Cache Line Prefetch [Enabled]
Intel (VMX) Virtualization Technology [Disabled]
Per P-Core Control [Disabled]
Per E-Core Control [Disabled]
Active Performance Cores [All]
Active Efficient Cores [All]
Hyper-Threading [Enabled]
Hyper-Threading of Core 0 [Enabled]
Hyper-Threading of Core 1 [Enabled]
Hyper-Threading of Core 2 [Enabled]
Hyper-Threading of Core 3 [Enabled]
Hyper-Threading of Core 4 [Enabled]
Hyper-Threading of Core 5 [Enabled]
Hyper-Threading of Core 6 [Enabled]
Hyper-Threading of Core 7 [Enabled]
Total Memory Encryption [Disabled]
Legacy Game Compatibility Mode [Disabled]
Boot performance mode [Auto]
Intel(R) SpeedStep(tm) [Enabled]
Intel(R) Speed Shift Technology [Disabled]
Turbo Mode [Enabled]
Acoustic Noise Mitigation [Disabled]
CPU C-states [Auto]
Thermal Monitor [Enabled]
Dual Tau Boost [Disabled]
VT-d [Disabled]
Memory Remap [Enabled]
Enable VMD controller [Enabled]
Map PCIE Storage under VMD [Disabled]
Map SATA Controller under VMD [Disabled]
M.2_1 Link Speed [Auto]
PCIEX16(G5)_1 Link Speed [Auto]
PCIEX16(G5)_2 Link Speed [Auto]
PCIEX1(G4) Link Speed [Auto]
PCIEX4(G4) Link Speed [Auto]
M.2_2 Link Speed [Auto]
DIMM.2_1 Link Speed [Auto]
DIMM.2_2 Link Speed [Auto]
SATA Controller(s) [Enabled]
Aggressive LPM Support [Disabled]
SMART Self Test [Enabled]
M.2_3 [Enabled]
M.2_3 Hot Plug [Disabled]
SATA6G_1 [Enabled]
SATA6G_1 Hot Plug [Disabled]
SATA6G_2 [Enabled]
SATA6G_2 Hot Plug [Disabled]
SATA6G_3 [Enabled]
SATA6G_3 Hot Plug [Disabled]
SATA6G_4 [Enabled]
SATA6G_4 Hot Plug [Disabled]
PTT [Enable]
Intel(R) Dynamic Tuning Technology [Disabled]
PCIE Tunneling over USB4 [Enabled]
Discrete Thunderbolt(TM) Support [Disabled]
Security Device Support [Enable]
SHA256 PCR Bank [Enabled]
Pending operation [None]
Platform Hierarchy [Enabled]
Storage Hierarchy [Enabled]
Endorsement Hierarchy [Enabled]
Physical Presence Spec Version [1.3]
Disable Block Sid [Disabled]
Password protection of Runtime Variables [Enable]
Above 4G Decoding [Enabled]
Resize BAR Support [Enabled]
SR-IOV Support [Disabled]
Legacy USB Support [Enabled]
XHCI Hand-off [Enabled]
SanDisk [Auto]
LAN_U32G2_1 [Enabled]
U32G1_E5 [Enabled]
U32G1_E6 [Enabled]
U32G1_E7 [Enabled]
U32G1_E8 [Enabled]
U32G2X2_C3 [Enabled]
U32G2_5 [Enabled]
U32G2_6 [Enabled]
U32G2_7 [Enabled]
U32G2_P8 [Enabled]
U32G2X2_C9 [Enabled]
U32G1_E1 [Enabled]
U32G1_E2 [Enabled]
U32G1_E3 [Enabled]
U32G1_E4 [Enabled]
Network Stack [Disabled]
Device [N/A]
Restore AC Power Loss [Power Off]
Max Power Saving [Disabled]
ErP Ready [Disabled]
Power On By PCI-E [Disabled]
Power On By RTC [Disabled]
USB Audio [Enabled]
Intel LAN [Enabled]
USB power delivery in Soft Off state (S5) [Disabled]
Connectivity mode (Wi-Fi & Bluetooth) [Disabled]
When system is in working state [All On]
Q-Code LED Function [POST Code Only]
When system is in sleep, hibernate or soft off states [All On]
M.2_2 Configuration [Auto]
ASMedia USB 3.2 Controller_U32G1_E12 [Enabled]
ASMedia USB 3.2 Controller_U32G1_E34 [Enabled]
GNA Device [Disabled]
ASMedia Storage Controller [Enabled]
Windows Hot-plug Notification [Disabled]
ASPM Support [Disabled]
CPU Temperature [Monitor]
CPU Package Temperature [Monitor]
MotherBoard Temperature [Monitor]
VRM Temperature [Monitor]
Chipset Temperature [Monitor]
T_Sensor Temperature [Monitor]
DIMM.2 Sensor 1 Temperature [Monitor]
DIMM.2 Sensor 2 Temperature [Monitor]
Water In T Sensor Temperature [Monitor]
Water Out T Sensor Temperature [Monitor]
DIMM A1 Temperature [Monitor]
DIMM B1 Temperature [Monitor]
CPU Fan Speed [Monitor]
CPU Optional Fan Speed [Monitor]
Chassis Fan 1 Speed [Monitor]
Chassis Fan 2 Speed [Monitor]
Chassis Fan 3 Speed [Monitor]
Water Pump+ Speed [Monitor]
AIO Pump Speed [Monitor]
Flow Rate [Monitor]
CPU Core Voltage [Monitor]
12V Voltage [Monitor]
5V Voltage [Monitor]
3.3V Voltage [Monitor]
Memory Controller Voltage [Monitor]
CPU Fan Q-Fan Control [DC Mode]
CPU Fan Profile [Standard]
CPU Fan Q-Fan Source [CPU]
CPU Fan Step Up [Level 0]
CPU Fan Step Down [Level 4]
CPU Fan Speed Low Limit [200 RPM]
Chassis Fan 1 Q-Fan Control [Auto Detect]
Chassis Fan 1 Profile [Standard]
Chassis Fan 1 Q-Fan Source [CPU]
Chassis Fan 1 Step Up [Level 0]
Chassis Fan 1 Step Down [Level 0]
Chassis Fan 1 Speed Low Limit [200 RPM]
Chassis Fan 2 Q-Fan Control [PWM Mode]
Chassis Fan 2 Profile [Standard]
Chassis Fan 2 Q-Fan Source [Chipset]
Chassis Fan 2 Step Up [Level 0]
Chassis Fan 2 Step Down [Level 4]
Chassis Fan 2 Speed Low Limit [200 RPM]
Chassis Fan 3 Q-Fan Control [DC Mode]
Chassis Fan 3 Profile [Silent]
Chassis Fan 3 Q-Fan Source [CPU]
Chassis Fan 3 Step Up [Level 0]
Chassis Fan 3 Step Down [Level 0]
Chassis Fan 3 Speed Low Limit [200 RPM]
Water Pump+ Q-Fan Control [PWM Mode]
Water Pump+ Profile [Manual]
Water Pump+ Q-Fan Source [CPU]
Water Pump+ Step Up [Level 0]
Water Pump+ Step Down [Level 4]
Water Pump+ Speed Low Limit [Ignore]
Water Pump+ Point4 Temperature [70]
Water Pump+ Point4 Duty Cycle (%) [100]
Water Pump+ Point3 Temperature [50]
Water Pump+ Point3 Duty Cycle (%) [85]
Water Pump+ Point2 Temperature [40]
Water Pump+ Point2 Duty Cycle (%) [80]
Water Pump+ Point1 Temperature [25]
Water Pump+ Point1 Duty Cycle (%) [60]
AIO Pump Q-Fan Control [Auto Detect]
AIO Pump Profile [Full Speed]
CPU Temperature LED Switch [Enabled]
Launch CSM [Disabled]
OS Type [Other OS]
Secure Boot Mode [Custom]
Fast Boot [Enabled]
Next Boot after AC Power Loss [Fast Boot]
Boot Logo Display [Auto]
POST Delay Time [3 sec]
Bootup NumLock State [On]
Wait For 'F1' If Error [Enabled]
Option ROM Messages [Force BIOS]
Interrupt 19 Capture [Disabled]
AMI Native NVMe Driver Support [Enabled]
Setup Mode [Advanced Mode]
Boot Sector (MBR/GPT) Recovery Policy [Local User Control]
Next Boot Recovery Action [Skip]
BIOS Image Rollback Support [Enabled]
Publish HII Resources [Disabled]
Flexkey [Safe Boot]
Setup Animator [Disabled]
Load from Profile [7]
Profile Name [7200CL32*42*42]
Save to Profile [2]
DIMM Slot Number [DIMM_A1]
Download & Install ARMOURY CRATE app [Disabled]
Download & Install MyASUS service & app [Disabled]

*****Edit:*****
Ring=Auto
V/F= -50mV and tested VST u. VT3. SFT ist zu viel den CPU leider. 5700MHz allcore und mit offset -50mV 1.208V
Pic 2
Darf nicht lassen, dass es 5700MHz lauft. Leider alle 14900k sind gleiche schon. Ich bin nicht aleine. Delid hilft ein bischen, aber so viel nicht. Es ist nicht delided.
 

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14900k allcore 5700MHz, und 2 o. 3 Kerne 60x. Es wird nie in Leben mit mein 6C Wasser gehen.
Hm ?

Kein PerCore und kein allcore.
Lass die CPU boosten sowie Clockgaten wenn sie es nötig hat.
Lass die CPU arbeiten wie sie designed wurde ~ optimiere die Curve allerdings, dann kommt mehr Clock raus.

Arbeitsschritte:
V/F Tool nützen P11 max clock um 100mV tiefer
Dann die genauen Werte im Bios eintragen,
neustarten und stabilitätstesten

Sobald fertig
Max clock (P11) um 25mV tiefer (in ASUS Tool)
Der rest der Kurve sollte sich anpassen
Neustarten, im Bios eintragen
Trainieren lassen und y-cruncher testen

Fals instabil , P9 leicht erhöhen (6mV schritten) aber unter kalkuliertem P10 halten
Ergebniss fotographieren, ins bios starten , Wert eingeben, nochmal testen
Falls weiterhin instabil P11 wieder erhöhen und falls P10 tiefer als P9 ist, P9 um (4+ mV) über P10 erhören (minimum)
Falls stabil, P8 leicht tiefer stellen ~ sollte bis P5 selbstständig die Kurve kalkurieren
Ergebniss notieren, im Bios eintragen

Wenn du fertig bist mit dem auslooten
VST+VT3 gegenprüfen (unsicher ob 1.25v VDD2_CPU/MC für 7200MT/s genügen)
Sobald man 3-4 Stunden schafft, ins Bios zurück und IA LLC von 0.3 auf 0.28 dann 0.25 ~ und SFT nochmal für mindestens ne 90min gegentesten.
V/F curve nicht mehr anfassen.


Bei dem Undervolten immer auf die Y-cruncher Rechenleistung achten.
50mV drop sind nicht uniform ein 50mV drop. Man arbeitet mit offsets und keine mV.
Der einzige uniforme drop, ist die IA LLC. Auch hier sind es mOhm Werte und keine Spannungen.
Spannungen sind und haben dynamisch zu bleiben.
Alles ist loadbalanced und hat Guardbands.

Ich empfehle ein anderes Tool.exe Menü für das VID/DieSense Tracking.
Schaue dir nochmal die Screenshots genauer an :)
Beitrag automatisch zusammengeführt:

Sobald man 3-4 Stunden schafft, ins Bios zurück und IA LLC von 0.3 auf 0.28 dann 0.25 ~ und SFT nochmal für mindestens ne 90min gegentesten.
V/F curve nicht mehr anfassen.
Bzw fals man V/F bis P5 oder sogar P3 fertig hat & weiterhin instabil ist ~ oder instabil bei höherem MemCLK wird:
Einfach IA LLC erhöhen. Sollte den selben Effekt haben nur etwas unsauberer sein.
Es ist schwierig Throttle zwischen den CurvePoints festzustellen wenn die CPU V/F Punkte (je nach VID & Thermals bzw Amperage-Load) überspringt.
Somit step by step und IOPS Rechenleistung beobachten.

Gebrauchte Spannung und gebrauchte Wattage ist irrelevant. Ebenso effective clock irrelevant
Alles heißt nicht "verwendbare IOPS".
So bis etwa 1387.5 VID - sollte es noch throttlen. Intern.
Unter 1400mV VID Curve.
Siehst du in einem anderen menü.
Schaue dir meine Screenshots nochmal genauer an.

Deine Leaky CPU hat ne V/F Curve bis 1.48xx
Wir wollen unter 1.4 VID bleiben.
Durch TVB kann eine Curve bis 1.6++ VID generiert werden.
Du wirst schon merken was ich meine aber du suchst nach einem anderen Curve Tracking Menu.
Beitrag automatisch zusammengeführt:

1704588089380.png

Das suchst du.
Verschiedene Last-Art verschiedener max VID und max clock
VID zu Diesense ist für dich interessant. Eigentlich nur VID & Rechenleistung.
Wattage ist unwichtig, effective clock ist unwichtig.

Keiner zwingt dich 5.7 allcore-load, zu rennen :unsure:
Wenn die CPU denkt sie kann es für SFT, lass sie. Bis 105° Grad hat sie headroom zu boosten, solange es innerhalb ICCMAX liegt
Und wenn du es aber nicht hinbekommst, gibt es noch AVX offsets 🤭
Aber eigentlich ist es nur eine V/F curve Arbeit.
Egal welche Frequenz anliegt (wie gesagt irrelevant, nur IOPS zählen) ~ kannst du tiefer und höher bekommen durch anpassen des punktes

Powerlimits offen, ICCMAX limitieren.
TVB hat ein menü im ASUS Tool um den Boost zwischen Kernanzahl zu limitieren (für alle Kerne bzw für 1-2 kerne)
Aber nach jeder Kurve Kalkulation musst du neustarten und sie im Bios eingeben.
Nicht sofort testen.
Beitrag automatisch zusammengeführt:

VID zu Diesense ist für dich interessant. Eigentlich nur VID & Rechenleistung.
Wattage ist unwichtig, effective clock ist unwichtig.
Ich verstehe auch nicht wieso man sich auf irgendwelche Spannung fixiert.
Das ist kein manueller OC. Du arbeitest nicht gegen die CPU, sondern mit dem Algorithmus.
Für eine Art von Last throttled sie auf 1.2v (FMA)
Für leichtere Last geht sie auf 1.35 hoch (SSE)
Für Cinebench geht sie vlt auf 1.28v hoch (AVX)

Alles normal. Lass sie boosten. Du rennst nicht 24/7 y-cruncher, clock ist irrelevant.
Spannung ist nicht alles und effective clock ist "fake". Spannung ist auch nicht konstant anliegend. Voltage gating existiert.
(IOPS) Rechenleistung ist was wichtig wäre. :) Die CPU throttled kostant, du möchtest die Curve tiefer bekommen damit sie weniger throttled und mehr max-IOPS "rauskommen".

Wenn sie dir am Schluss dann weiterhin zu heiß ist (persöhnlich, für die CPU ist es ok bis 105°), kann man PL1/2 reinhauen
Bei dem Tuning müssen sie weg. Nur ICCMAX damit die CPU nicht degraded.
Intel Spec = 400A. 420A ist noch ok. Intel-Spec sagt 400A.
 
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Hoffentlich melde ich mich schnell. Es ist nicht 10 Minute. Total anders wie ich es in meinem Leben bis jetzt gemacht hab. Wirds schon gehen, danke.
 
Hoffentlich melde ich mich schnell. Es ist nicht 10 Minute. Total anders wie ich es in meinem Leben bis jetzt gemacht hab. Wirds schon gehen, danke.
Versuche es zu lernen :)
So arbeiten Zen CPUs (etwas mehr variablen)
Und so arbeiten 12++ Gen, Intel CPUs.
Es wird nur komplexer, nicht einfacher.
AMD nutzt AVFS für alles, GPUs inclusive.

Manual "fixed" clock is dead since ~2014 🤭

12th gen hatte eigene V/F Punkte.
13/14th gen hat ein "highest voltage wins" System.
Hier muss man besonders bei der V/F curve aufpassen.
Kein Punkt in der mitte darf "als resultat, nicht als offset" ~ höher sein als der nächste Punkt

P6 1100mV
P7 1150
P8 1125
Darf nicht passieren !
P8 wird ignoriert und jeder Punkt drüber welcher "als Resultat !" weniger Spannung sich nimmt ~ wird ignoriert.
Siehe:
SlMX27W.png

~ grobes Beispiel

Die Werte welche du eingibst sind "shifting-offsets"
Sie nehmen die Fused Curve und bewegen sie um X mV
Sie heißen nicht gleich mV. Sie sind nur offsets. Keine echte Spannung

Sobald du fertig bist,
Ist es egal welche Clock rennt. Sie wird sich nach dieser Curve orientieren.
Du musst dir viel mühe geben und verschiedene Lastarten testen, dass du kein negatives Scaling hast
Wenn die CPU dann merkt sie hat noch (A) & C° Headroom, wird sie höher boosten.
Es ist unwichtig welcher clock anliegt, aber wenn es unterhalb des Spannungslimits liegt, boostet sie höher.
Somit ist es wichtig, die gesammt Curve gut und niedrig hinbekommen. Dann kommen auch mehr MHz raus.
Oder minimum mehr IOPS pro MHz clock. Somit kann auch Ring selbstständig höher, sollte noch "headroom" bleiben.
 
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Versuche es zu lernen :)
So arbeiten Zen CPUs (etwas mehr variablen)
Und so arbeiten 12++ Gen, Intel CPUs.
Es wird nur komplexer, nicht einfacher.
AMD nutzt AVFS für alles, GPUs inclusive.

Manual "fixed" clock is dead since ~2014 🤭

12th gen hatte eigene V/F Punkte.
13/14th gen hat ein "highest voltage wins" System.
Hier muss man besonders bei der V/F curve aufpassen.
Kein Punkt in der mitte darf "als resultat, nicht als offset" ~ höher sein als der nächste Punkt

P6 1100mV
P7 1150
P8 1125
Darf nicht passieren !
P8 wird ignoriert und jeder Punkt drüber welcher "als Resultat !" weniger Spannung sich nimmt ~ wird ignoriert.
Siehe:
SlMX27W.png

~ grobes Beispiel

Die Werte welche du eingibst sind "shifting-offsets"
Sie nehmen die Fused Curve und bewegen sie um X mV
Sie heißen nicht gleich mV. Sie sind nur offsets. Keine echte Spannung

Sobald du fertig bist,
Ist es egal welche Clock rennt. Sie wird sich nach dieser Curve orientieren.
Du musst dir viel mühe geben und verschiedene Lastarten testen, dass du kein negatives Scaling hast
Wenn die CPU dann merkt sie hat noch (A) & C° Headroom, wird sie höher boosten.
Es ist unwichtig welcher clock anliegt, aber wenn es unterhalb des Spannungslimits liegt, boostet sie höher.
Somit ist es wichtig, die gesammt Curve gut und niedrig hinbekommen. Dann kommen auch mehr MHz raus.
Oder minimum mehr IOPS pro MHz clock. Somit kann auch Ring selbstständig höher, sollte noch "headroom" bleiben.
Letzte Frage bevor ich "verschwunde" (es dauert viel Zeit) Welche Sicherung darf/kann ich nutzen?
Amper auto oder 420A?
Temperature auto oder darf ich zB.: 95C eingeben?
PL1 u. 2 darf ich etwas eingeben, oder 4095W? Auto sind 4095, grrrr, das ist kein Sicherung.
Die Kerne sind auf auto. Boostet so hoch wie cpu will, ok.

Ich will nicht kochen auf dem Rechner :), morgen werde ich draussen in Garten. Ich denke, dass cpu kuemmert sich um selbe, aber ich moechte alles einsichern.

Noch etwas: Es ist sehr gutes Thema, aber es ist bischen weit weg von RAM OC, deswegen sorry fuer Forum. Vielleich nutzt noch es Jemend. Danke die viele gutes Infos (y)
 
Letzte Frage bevor ich "verschwunde" (es dauert viel Zeit) Welche Sicherung darf/kann ich nutzen?
Amper auto oder 420A?
Temperature auto oder darf ich zB.: 95C eingeben?
PL1 u. 2 darf ich etwas eingeben, oder 4095W? Auto sind 4095, grrrr, das ist kein Sicherung.
Die Kerne sind auf auto. Boostet so hoch wie cpu will, ok.

Ich will nicht kochen auf dem Rechner :), morgen werde ich draussen in Garten. Ich denke, dass cpu kuemmert sich um selbe, aber ich moechte alles einsichern.

Noch etwas, sehr gutes Thema, aber es ist bischen weit weg von RAM OC, deswegen sorry fuer Forum. Vielleich nutzt noch es Jemend. Danke die viele gutes Infos (y)
ASUS hat ein " unlimited Powerlimit, 90° " ~ Limiter Preset
Die CPUs können 105° short, 90-95°? Long.

Unlimited PL1/PL2 ~ ein Powersupply und Spike-Limiter, bei dem Tuning nur störend.
ICCMAX ist die Hauptsicherung. Kann höher oder tiefer je nach Kühlungsart. Deine ist schon Overkill.
400A wäre "nichts".

Wenn du möchtest kannst du das "all unlocked" powerlimit preset laden
95° Peak eingeben.
ICCMAX auf 400A fixieren (ASUS mag es gerne 700-800A als default zu benützen)
VR Max auf 1700 ist genug, aber du kannst gerne zwischen 1500-1650 bleiben.
Es ist VID Max, intern. Wäre für uns unwichtig und kann auf 1500 bleiben, dann merkst du den Throttle einfacher.
Aber stock auf 1500 wäre ein Performance loss ~ den es gibt mehrere Arten von VID. (kann man auslesen)

Normale CPUs auf 1400mV, V/F Fused boosten auch bis 1500mV hoch
Deine auf 1487mV sollte auch auf 1500mV intern versuchen zu boosten, aber ich kann dir nicht sagen ob Intel die Range für deine bis 1550mV erhöht hat.
Jedenfalls VR MAX unter 1700 ist ok. Aber ab 1400mV normalerweise ~ throttled man. Kann etwas anders für 14th gen vs 13th gen sein.
Im Endeffekt, hau dir 1500-1600 rein (wie du magst) ~ am Schluss orientiert sich alles nach ICCMAX.

Abseits den Oberflächlichen Limiters
Hat die CPU intern die Möglichkeit sich zu throttlen.
Jede CPU throttled Werks-aus.
Die meisten versuchen aber erstmal das Thermal limit zu erreichen und 14th gen besonders, boostet erstmal per core auf 105° ~ bevor es die anderen Limiter erreicht.

Du brauchst auf ASUS Boards nicht viel mehr machen.
ICCMAX fixed, VR Max runter (höher bringt eh nichts, nur fake clock)
1704593220870.png

Und wenn du dich persönlich wohler fühlst, 90° long-duration cap. Muss aber nicht sein.

Die letzten 4-5 Jahre wurde Substrate soo sehr Optimiert dass es nicht wie bei Sandy/Ivy Bridge nahe 70° instabil wird.
Sie können momentan einfach die 90°-95° halten.
Silicon wird besser und besser. Es ist komplett normal dass sie für X kurze Zeit hochboosten
Kritisch wird es wenn der Nutzer Spannungen und Clock fixiert. So kann es weder voltage noch clock gating ~ was die Runtime erhöht und die chance auf schäden erhöht.
Man sollte die CPU so lassen wie sie designed wurde und nur strategisch undervolten + leicht den Target-Clock erhöhen.
Niemals Spannungen fixieren, den das nimmt die möglichkeit weg dass diese Dynamisch sich runterregeln (weitaus schneller als unsere Tools tracken können, unter 10ms)
Beitrag automatisch zusammengeführt:

EDIT:

Curve VID ist intern ~ V/F punkte sind intern.
IA LCC ist extern. DieSense ist extern aber direkt unter der CPU. Dennoch mit Verluste.
LLCs (Telemetry Faking) ist die Faule Art zu undervolten. Aber die CPU erkennt das und 13/14th gen spielen mit.
Optimal ist es nicht. Den die CPU hat keine Lineare Spannungseffizienz. Die Kurve ist eine Schlange wie du auf den Bildern sehen kannst.

Curve VID unter 1720mV tötet nicht die CPU
DieSense zwischen 1.25-1.55v , je nach Lastart und LastZeit. Sowie Amperage.
Amperage zu Kühlung ist was Degredation erstellt. Thermals sind nur "foldover" Szenarien, welches sich die letzten minimum 3-4 Jahren deutlich verbessert hat.
Sie haben wenig bis keinen direkten einfluss auf die (A) Limits. Sie haben einfluss auf die Holdtime welches so oder so als Stability rauskommt.
Bei dem Stability-Point regelt die CPU schon gegen und bei überspannung werden brauchbare IOPS minimal bis nicht existent. Somit tötet sich die CPU auch mit dummer Spannung nicht selbst :)

Nur weil VR Max auf 1720mV capt, heißt es noch lange nicht dass diese OK für die CPU sind
Und nur weil bei einer Lastart 1300mV ok sind, heißt es nicht dass y-cruncher zb über 1250mV mag.
Alles ein FailureInTime und Health Thema. Leakage thema und Amperage Thema ~ Die CPU kennt sich selber schon aus :geek:
Somit sollte man das Spannungsthema vergessen und sie selbst sich regeln lassen. Nur undervolten wo es geht und reine Rechenleistung tracken.
Ist die Rechenleistung weniger, trottelst du mehr. Ist sie höher, trottelst du weniger. Aber du trottelst immer 🤭
Beitrag automatisch zusammengeführt:

On 3rd test i changed TVB peak, (applied to 4th too)
But it made no sense, as Curve already reached ceiling. No more potential effective clock

After smoothing lower points of curve and effectively it-itself (max-VID) lowering
CPU saw more margins and boosted higher, also became stable 🤭 It was throttling into instability, maybe hidden jumping too often clock ~ unsure but unstable on some tests

Smoothing itself changed curve ceiling voltage cap, but did not change Vout (DieSense)
It did not change powerdraw higher, yet gave back the throttled 200MHz. Soo Geekbench3 and all application showed significant improvement :)
Only because curvecap was lower and finally less/barely throttle vs before stronger throttle but not enough margins to let CPU boost higher.

Between 1-3 and earlier 7 tests, effective clock stayed the same.
It simply was IOPS throttling less and less, till it finally had enough margins to clock higher.
But clocking higher still doesnt mean more IOPS 🤭
 
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habt ihr eigentlich schon die ram direct wasserkühler von iceman gesehen ? - da wird das wasser durch den ram block geleitet lol ...

EgpXDTN.png


te0k2yZ.png


preis : 164euro
 
Eigentlich interessant, aber wenn mit normalen Wasserkühlern habe ich aktuell immer grob ein Delta zwischen Wasser und Ram-Temp von ca. 3-6 Grad. Bringt dann der Direct Die so viel mehr?

Und wie "sicher" ist die Dichtung zwischen Kühler und Ram-Cover und wie lässt sich das ganze abmontieren ohne das wir mit Pech Reste von der Kühlflüssigkeit über die RAMs laufen.

Gibt es den schon zu kaufen?
Hast du ein Link zum Shop?

Edit:

 
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wo finde ich diese Tabelle? Kann ich da alles selber eingeben?

@Veii Firstly thanks for all your Infomations here. Also I started from scratch my CPU and RAM OC, if i try 6600/6800 i get errors. I use Prime 95 Blend my workers Stopping/ + WHEA Error Cpu+ L2
With this Current Setup like this any tipps or improvements could you look maybe at my timings?
CPU is 13700K @ Best Case Scenario and -0.018 SVID on 5,5Ghz all Core and 4,3 E Core and 4,7 Ring. XMP I Loaded and tweaked by myself fully stable. In Aida ima between 59,3ns- 60,5
I Think im Cursed too my pc freezes randomly when i use ASRTC

meine v/f kurven sind standart im bios ka habe da gefummelt aber hat gefühlt nichts bewirkt?
ach wieso schreibe ich englisch du kannst doch deutsch xd
 

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Actually interesting, but when using normal water coolers I currently always have a delta between water and ram temp of around 3-6 degrees. Does the Direct Die bring so much more?

And how “safe” is the seal between the cooler and the ram cover and how can the whole thing be removed without having bad luck leaving residues of the coolant running over the RAMs.

Is it already available to buy?
Do you have a link to the shop?

Edit:


Be careful some DD ram blocks leak: https://www.overclock.net/threads/o...memory-stability-thread.1794772/post-29282386
 
@Braegnok

Yeah, just read some posts in this thread and it seems that some people have problems with this block - leaking or quality issues with the screws.

But i am happy with my Bitspower cooler. "Direct die" is no opinion for me.
 
wo finde ich diese Tabelle? Kann ich da alles selber eingeben?

Firstly thanks for all your Infomations here. Also I started from scratch my CPU and RAM OC, if i try 6600/6800 i get errors. I use Prime 95 Blend my workers Stopping/ + WHEA Error Cpu+ L2
With this Current Setup like this any tipps or improvements could you look maybe at my timings?
CPU is 13700K @ Best Case Scenario and -0.018 SVID on 5,5Ghz all Core and 4,3 E Core and 4,7 Ring. XMP I Loaded and tweaked by myself fully stable. In Aida ima between 59,3ns- 60,5
I Think im Cursed too my pc freezes randomly when i use ASRTC

meine v/f kurven sind standart im bios ka habe da gefummelt aber hat gefühlt nichts bewirkt?
ach wieso schreibe ich englisch du kannst doch deutsch xd
Ich hab dir hier mal meine Eingaben, für 6800MHZ. Ich habe ein Z690 Formula. Sollte in etwa gleich sein wie dein HERO.

VDD und VDDQ 1.41v
IMC VDD 1.35
 

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@Braegnok

Yeah, just read some posts in this thread and it seems that some people have problems with this block - leaking or quality issues with the screws.

But I am happy with my Bitspower cooler. "Direct die" is no opinion for me.

I use BartX DDR5 Copper shields with copper shims, old school but they work very well.

Shields: https://bartxstore.com/shop/custom-ram-copper-heatsinks-for-ddr5-ddr4/

Shims: https://www.amazon.com/dp/B07B3VC9X2?ref=ppx_yo2ov_dt_b_product_details&th=1

block: https://bartxstore.com/shop/ram-water-block-bx2-black/

The 0.5mm shims on the ICs with a thin layer of thermal paste. Thermal pads on the PMIC, and back of PCB. https://bartxstore.com/wp-content/uploads/2022/11/Copper-RAM-Heatsinks-Assembly-Manual-rev-0.2.pdf

IMG_2647.JPG IMG_3049.JPG RAM Shims.JPG IMG_2666.JPG Screenshot 2023-08-15 172033.png
 
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Bis wieviel vdimm könnte man den gehen mit Luft? Hab jetzt 1,4850v und ram hat ca. 32grad. Wollte halt gern über 8000mhz aber sehe ich nur ü1,500v bei allen die so hoch sind.
 
@Veii

Heute habe ich leider keine Zeit, aber schwer mich es nicht zu machen. Ganz kurz habe ich zwischen 51x-58x points fuer SFT ausgemacht. 8 Min lang getestet nur, aber wenn es fuer SFT stabil ist, dann genug fuer VST/VT3.
NvExperience schnell installiert, so konnte ich kurz Video machen. Besser wie einen Bild.


Video


[2024/01/07 13:12:25]
Ai Overclock Tuner [Auto]
Intel(R) Adaptive Boost Technology [Auto]
ASUS MultiCore Enhancement [Enabled – Remove All limits (90°C)]
SVID Behavior [Trained]
BCLK Frequency : DRAM Frequency Ratio [100:100]
Memory Controller : DRAM Frequency Ratio [1:2]
DRAM Frequency [DDR5-7200MHz]
Performance Core Ratio [Auto]
Performance Core0 Specific Ratio Limit [Auto]
Performance Core0 specific Voltage [Auto]
Performance Core1 Specific Ratio Limit [Auto]
Performance Core1 specific Voltage [Auto]
*Performance Core2 Specific Ratio Limit [Auto]
Performance Core2 specific Voltage [Auto]
*Performance Core3 Specific Ratio Limit [Auto]
Performance Core3 specific Voltage [Auto]
Performance Core4 Specific Ratio Limit [Auto]
Performance Core4 specific Voltage [Auto]
Performance Core5 Specific Ratio Limit [Auto]
Performance Core5 specific Voltage [Auto]
Performance Core6 Specific Ratio Limit [Auto]
Performance Core6 specific Voltage [Auto]
Performance Core7 Specific Ratio Limit [Auto]
Performance Core7 specific Voltage [Auto]
Efficient Core Ratio [Auto]
Efficient Core Group0 Specific Ratio Limit [Auto]
Efficient Core Group0 specific Voltage [Auto]
Efficient Core Group1 Specific Ratio Limit [Auto]
Efficient Core Group1 specific Voltage [Auto]
Efficient Core Group2 Specific Ratio Limit [Auto]
Efficient Core Group2 specific Voltage [Auto]
Efficient Core Group3 Specific Ratio Limit [Auto]
Efficient Core Group3 specific Voltage [Auto]
AVX2 [Auto]
AVX2 Ratio Offset to per-core Ratio Limit [Auto]
AVX2 Voltage Guardband Scale Factor [Auto]
Maximus Tweak [Mode 2]
DRAM CAS# Latency [32]
DRAM RAS# to CAS# Delay Read [42]
DRAM RAS# to CAS# Delay Write [16]
DRAM RAS# PRE Time [42]
DRAM RAS# ACT Time [54]
DRAM Command Rate [2N]
DRAM RAS# to RAS# Delay L [12]
DRAM RAS# to RAS# Delay S [8]
DRAM REF Cycle Time 2 [448]
DRAM REF Cycle Time Same Bank [Auto]
DRAM Refresh Interval [131071]
DRAM WRITE Recovery Time [24]
DRAM READ to PRE Time [12]
DRAM FOUR ACT WIN Time [32]
DRAM WRITE to READ Delay L [24]
DRAM WRITE to READ Delay S [10]
DRAM CKE Minimum Pulse Width [Auto]
DRAM Write Latency [30]
Ctl0 dqvrefup [154]
Ctl0 dqvrefdn [72]
Ctl0 dqodtvrefup [Auto]
Ctl0 dqodtvrefdn [Auto]
Ctl1 cmdvrefup [Auto]
Ctl1 ctlvrefup [Auto]
Ctl1 clkvrefup [Auto]
Ctl1 ckecsvrefup [Auto]
Ctl2 cmdvrefdn [Auto]
Ctl2 ctlvrefdn [Auto]
Ctl2 clkvrefdn [Auto]
Read Equalization RxEq Start Sign [-]
Read Equalization RxEq Start [Auto]
Read Equalization RxEq Stop Sign [-]
Read Equalization RxEq Stop [Auto]
ODT_READ_DURATION [Auto]
ODT_READ_DELAY [Auto]
ODT_WRITE_DURATION [Auto]
ODT_WRITE_DELAY [Auto]
DQ RTT WR [40 DRAM Clock]
DQ RTT NOM RD [40 DRAM Clock]
DQ RTT NOM WR [40 DRAM Clock]
DQ RTT PARK [34 DRAM Clock]
DQ RTT PARK DQS [34 DRAM Clock]
GroupA CA ODT [240 DRAM Clock]
GroupA CS ODT [0 DRAM Clock]
GroupA CK ODT [0 DRAM Clock]
GroupB CA ODT [60 DRAM Clock]
GroupB CS ODT [40 DRAM Clock]
GroupB CK ODT [40 DRAM Clock]
Pull-up Output Driver Impedance [34 DRAM Clock]
Pull-Down Output Driver Impedance [34 DRAM Clock]
DQ RTT WR [40 DRAM Clock]
DQ RTT NOM RD [40 DRAM Clock]
DQ RTT NOM WR [40 DRAM Clock]
DQ RTT PARK [34 DRAM Clock]
DQ RTT PARK DQS [34 DRAM Clock]
GroupA CA ODT [240 DRAM Clock]
GroupA CS ODT [0 DRAM Clock]
GroupA CK ODT [0 DRAM Clock]
GroupB CA ODT [60 DRAM Clock]
GroupB CS ODT [40 DRAM Clock]
GroupB CK ODT [40 DRAM Clock]
Pull-up Output Driver Impedance [34 DRAM Clock]
Pull-Down Output Driver Impedance [34 DRAM Clock]
Round Trip Latency Init Value MC0 CHA [Auto]
Round Trip Latency Max Value MC0 CHA [Auto]
Round Trip Latency Offset Value Mode Sign MC0 CHA [-]
Round Trip Latency Offset Value MC0 CHA [Auto]
Round Trip Latency Init Value MC0 CHB [Auto]
Round Trip Latency Max Value MC0 CHB [Auto]
Round Trip Latency Offset Value Mode Sign MC0 CHB [-]
Round Trip Latency Offset Value MC0 CHB [Auto]
Round Trip Latency Init Value MC1 CHA [Auto]
Round Trip Latency Max Value MC1 CHA [Auto]
Round Trip Latency Offset Value Mode Sign MC1 CHA [-]
Round Trip Latency Offset Value MC1 CHA [Auto]
Round Trip Latency Init Value MC1 CHB [Auto]
Round Trip Latency Max Value MC1 CHB [Auto]
Round Trip Latency Offset Value Mode Sign MC1 CHB [-]
Round Trip Latency Offset Value MC1 CHB [Auto]
Round Trip Latency MC0 CHA R0 [Auto]
Round Trip Latency MC0 CHA R1 [Auto]
Round Trip Latency MC0 CHA R2 [0]
Round Trip Latency MC0 CHA R3 [0]
Round Trip Latency MC0 CHA R4 [0]
Round Trip Latency MC0 CHA R5 [0]
Round Trip Latency MC0 CHA R6 [0]
Round Trip Latency MC0 CHA R7 [0]
Round Trip Latency MC0 CHB R0 [Auto]
Round Trip Latency MC0 CHB R1 [Auto]
Round Trip Latency MC0 CHB R2 [0]
Round Trip Latency MC0 CHB R3 [0]
Round Trip Latency MC0 CHB R4 [0]
Round Trip Latency MC0 CHB R5 [0]
Round Trip Latency MC0 CHB R6 [0]
Round Trip Latency MC0 CHB R7 [0]
Round Trip Latency MC1 CHA R0 [Auto]
Round Trip Latency MC1 CHA R1 [Auto]
Round Trip Latency MC1 CHA R2 [0]
Round Trip Latency MC1 CHA R3 [0]
Round Trip Latency MC1 CHA R4 [0]
Round Trip Latency MC1 CHA R5 [0]
Round Trip Latency MC1 CHA R6 [0]
Round Trip Latency MC1 CHA R7 [0]
Round Trip Latency MC1 CHB R0 [Auto]
Round Trip Latency MC1 CHB R1 [Auto]
Round Trip Latency MC1 CHB R2 [0]
Round Trip Latency MC1 CHB R3 [0]
Round Trip Latency MC1 CHB R4 [0]
Round Trip Latency MC1 CHB R5 [0]
Round Trip Latency MC1 CHB R6 [0]
Round Trip Latency MC1 CHB R7 [0]
Early Command Training [Auto]
SenseAmp Offset Training [Auto]
Early ReadMPR Timing Centering 2D [Auto]
Read MPR Training [Auto]
Receive Enable Training [Auto]
Jedec Write Leveling [Auto]
Early Write Time Centering 2D [Auto]
Early Read Time Centering 2D [Auto]
Write Timing Centering 1D [Auto]
Write Voltage Centering 1D [Auto]
Read Timing Centering 1D [Auto]
Read Timing Centering with JR [Auto]
Dimm ODT Training* [Disabled]
Max RTT_WR [ODT Off]
DIMM RON Training* [Disabled]
Write Drive Strength/Equalization 2D* [Auto]
Write Slew Rate Training* [Auto]
Read ODT Training* [Disabled]
Comp Optimization Training [Auto]
Read Equalization Training* [Auto]
Read Amplifier Training* [Auto]
Write Timing Centering 2D [Auto]
Read Timing Centering 2D [Auto]
Command Voltage Centering [Auto]
Early Command Voltage Centering [Auto]
Write Voltage Centering 2D [Auto]
Read Voltage Centering 2D [Auto]
Late Command Training [Auto]
Round Trip Latency [Auto]
Turn Around Timing Training [Auto]
CMD CTL CLK Slew Rate [Auto]
CMD/CTL DS & E 2D [Auto]
Read Voltage Centering 1D [Auto]
TxDqTCO Comp Training* [Auto]
ClkTCO Comp Training* [Auto]
TxDqsTCO Comp Training* [Auto]
VccDLL Bypass Training [Auto]
CMD/CTL Drive Strength Up/Dn 2D [Auto]
DIMM CA ODT Training [Auto]
PanicVttDnLp Training* [Auto]
Read Vref Decap Training* [Auto]
Vddq Training [Disabled]
Duty Cycle Correction Training [Auto]
Periodic DCC [Auto]
Rank Margin Tool Per Bit [Auto]
DIMM DFE Training [Auto]
EARLY DIMM DFE Training [Auto]
Tx Dqs Dcc Training [Auto]
DRAM DCA Training [Auto]
Write Driver Strength Training [Auto]
Rank Margin Tool [Auto]
Memory Test [Auto]
DIMM SPD Alias Test [Auto]
Receive Enable Centering 1D [Auto]
Retrain Margin Check [Auto]
Write Drive Strength Up/Dn independently [Auto]
LPDDR DqDqs Re-Training [Auto]
Margin Check Limit [Disabled]
tRDRD_sg_Training [Auto]
tRDRD_sg_Runtime [16]
tRDRD_dg_Training [Auto]
tRDRD_dg_Runtime [8]
tRDWR_sg [18]
tRDWR_dg [18]
tWRWR_sg [16]
tWRWR_dg [8]
tWRRD_sg [Auto]
tWRRD_dg [Auto]
tRDRD_dr [0]
tRDRD_dd [Auto]
tRDWR_dr [0]
tRDWR_dd [Auto]
tWRWR_dr [0]
tWRWR_dd [Auto]
tWRRD_dr [0]
tWRRD_dd [Auto]
tRPRE [Auto]
tWPRE [Auto]
tWPOST [Auto]
tWRPRE [Auto]
tPRPDEN [Auto]
tRDPDEN [Auto]
tWRPDEN [Auto]
tCPDED [Auto]
tREFIX9 [Auto]
Ref Interval [Auto]
tXPDLL [Auto]
tXP [Auto]
tPPD [Auto]
tCCD_L_tDLLK [Auto]
tZQCAL [Auto]
tZQCS [Auto]
OREF_RI [Auto]
Refresh Watermarks [High]
Refresh Hp Wm [Auto]
Refresh Panic Wm [Auto]
Refresh Abr Release [Auto]
tXSDLL [Auto]
tZQOPER [Auto]
tMOD [Auto]
CounttREFIWhileRefEn [Auto]
HPRefOnMRS [Auto]
SRX Ref Debits [Auto]
RAISE BLK WAIT [Auto]
Ref Stagger En [Auto]
Ref Stagger Mode [Auto]
Disable Stolen Refresh [Auto]
En Ref Type Display [Auto]
Trefipulse Stagger Disable [Auto]
tRPab ext [Auto]
derating ext [Auto]
Allow 2cyc B2B LPDDR [Auto]
tCSH [Auto]
tCSL [Auto]
powerdown Enable [Auto]
idle length [Auto]
raise cke after exit latency [Auto]
powerdown latency [Auto]
powerdown length [Auto]
selfrefresh latency [Auto]
selfrefresh length [Auto]
ckevalid length [Auto]
ckevalid enable [Auto]
idle enable [Auto]
selfrefresh enable [Auto]
Address mirror [Auto]
no gear4 param divide [Auto]
x8 device [Auto]
no gear2 param divide [Auto]
ddr 1dpc split ranks on subch [Auto]
write0 enable [Auto]
MultiCycCmd [Auto]
WCKDiffLowInIdle [Auto]
PBR Disable [Auto]
PBR OOO Dis [Auto]
PBR Disable on hot [Auto]
PBR Exit on Idle Cnt [Auto]
tXSR [Auto]
Dec tCWL [Auto]
Add tCWL [Auto]
Add 1Qclk delay [Auto]
MRC Fast Boot [Disabled]
MCH Full Check [Auto]
Mem Over Clock Fail Count [2]
Training Profile [Auto]
RxDfe [Auto]
Mrc Training Loop Count [2]
DRAM CLK Period [Auto]
Dll_bwsel [Auto]
Controller 0, Channel 0 Control [Enabled]
Controller 0, Channel 1 Control [Enabled]
Controller 1, Channel 0 Control [Enabled]
Controller 1, Channel 1 Control [Enabled]
MC_Vref0 [Auto]
MC_Vref1 [Auto]
MC_Vref2 [Auto]
Fine Granularity Refresh mode [Auto]
SDRAM Density Per Die [Auto]
SDRAM Banks Per Bank Group [Auto]
SDRAM Bank Groups [Auto]
Dynamic Memory Boost [Disabled]
Realtime Memory Frequency [Disabled]
SA GV [Disabled]
Voltage Monitor [Die Sense]
VRM Initialization Check [Enabled]
CPU Input Voltage Load-line Calibration [Auto]
CPU Load-line Calibration [Auto]
Synch ACDC Loadline with VRM Loadline [Disabled]
CPU Current Capability [Auto]
CPU Current Reporting [Auto]
Core Voltage Suspension [Auto]
CPU VRM Switching Frequency [Auto]
VRM Spread Spectrum [Auto]
CPU Power Duty Control [Auto]
CPU Power Phase Control [Auto]
CPU Power Thermal Control [125]
CPU Core/Cache Boot Voltage [Auto]
CPU Input Boot Voltage [Auto]
PLL Termination Boot Voltage [Auto]
CPU Standby Boot Voltage [Auto]
Memory Controller Boot Voltage [Auto]
CPU Core Auto Voltage Cap [Auto]
CPU Input Auto Voltage Cap [Auto]
Memory Controller Auto Voltage Cap [Auto]
Fast Throttle Threshold [Auto]
Package Temperature Threshold [Auto]
Regulate Frequency by above Threshold [Auto]
IVR Transmitter VDDQ ICCMAX [Auto]
Unlimited ICCMAX [Auto]
CPU Core/Cache Current Limit Max. [420.00]
Long Duration Package Power Limit [Auto]
Package Power Time Window [Auto]
Short Duration Package Power Limit [Auto]
Dual Tau Boost [Disabled]
IA AC Load Line [0.30]
IA DC Load Line [Auto]
IA CEP Enable [Disabled]
SA CEP Enable [Disabled]
IA SoC Iccmax Reactive Protector [Auto]
Inverse Temperature Dependency Throttle [Auto]
IA VR Voltage Limit [1650]
CPU SVID Support [Auto]
Cache Dynamic OC Switcher [Auto]
TVB Voltage Optimizations [Enabled]
Enhanced TVB [Enabled]
Overclocking TVB [Boost Until Target]
Max Boost Target in MHz [Auto]
Overclocking TVB Global Temperature Offset Sign [+]
Overclocking TVB Global Temperature Offset Value [Auto]
Offset Mode Sign 1 [+]
V/F Point 1 Offset [Auto]
Offset Mode Sign 2 [+]
V/F Point 2 Offset [Auto]
Offset Mode Sign 3 [+]
V/F Point 3 Offset [Auto]
Offset Mode Sign 4 [+]
V/F Point 4 Offset [Auto]
Offset Mode Sign 5 [-]
V/F Point 5 Offset [0.01000]
Offset Mode Sign 6 [-]
V/F Point 6 Offset [0.02500]
Offset Mode Sign 7 [-]
V/F Point 7 Offset [0.02600]
Offset Mode Sign 8 [-]
V/F Point 8 Offset [0.02800]
Offset Mode Sign 9 [-]
V/F Point 9 Offset [0.03000]
Offset Mode Sign 10 [-]
V/F Point 10 Offset [0.03400]
Offset Mode Sign 11 [-]
V/F Point 11 Offset [0.03500]
Initial BCLK Frequency [Auto]
Runtime BCLK OC [Auto]
BCLK Amplitude [Auto]
BCLK Slew Rate [Auto]
BCLK Spread Spectrum [Auto]
Initial PCIE Frequency [Auto]
PCIE/DMI Amplitude [Auto]
PCIE/DMI Slew Rate [Auto]
PCIE/DMI Spread Spectrum [Auto]
Cold Boot PCIE Frequency [Auto]
Realtime Memory Timing [Disabled]
SPD Write Disable [TRUE]
PVD Ratio Threshold [Auto]
SA PLL Frequency Override [Auto]
BCLK TSC HW Fixup [Enabled]
Core Ratio Extension Mode [Disabled]
FLL OC mode [Auto]
UnderVolt Protection [Disabled]
Switch Microcode [Current Microcode]
Xtreme Tweaking [Disabled]
Core PLL Voltage [Auto]
GT PLL Voltage [Auto]
Ring PLL Voltage [Auto]
System Agent PLL Voltage [Auto]
Memory Controller PLL Voltage [Auto]
Efficient-core PLL Voltage [Auto]
CPU 1.8V Small Rail [Auto]
PLL Termination Voltage [Auto]
CPU Standby Voltage [Auto]
PCH 1.05V Voltage [Auto]
PCH 0.82V Voltage [Auto]
CPU Input Voltage Reset Voltage [Auto]
Eventual CPU Input Voltage [Auto]
Eventual Memory Controller Voltage [Auto]
Package Temperature Threshold [Auto]
Regulate Frequency by above Threshold [Auto]
Cooler Efficiency Customize [Keep Training]
Cooler Re-evaluation Algorithm [Normal]
Optimism Scale [100]
Ring Down Bin [Auto]
Min. CPU Cache Ratio [Auto]
Max. CPU Cache Ratio [Auto]
BCLK Aware Adaptive Voltage [Auto]
Actual VRM Core Voltage [Auto]
Global Core SVID Voltage [Auto]
Cache SVID Voltage [Auto]
CPU L2 Voltage [Auto]
CPU System Agent Voltage [Manual Mode]
- CPU System Agent Voltage Override [1.12000]
CPU Input Voltage [Auto]
High DRAM Voltage Mode [Enabled]
DRAM VDD Voltage [1.45000]
DRAM VDDQ Voltage [1.43000]
IVR Transmitter VDDQ Voltage [1.24000]
Memory Controller Voltage [1.21250]
MC Voltage Calculation Voltage Base [Auto]
VDD Calculation Voltage Base [Auto]
PMIC Voltages [Auto]
PCI Express Native Power Management [Enabled]
Native ASPM [Disabled]
DMI Link ASPM Control [Disabled]
ASPM [Auto]
L1 Substates [Disabled]
DMI ASPM [Disabled]
DMI Gen3 ASPM [Disabled]
PEG - ASPM [Disabled]
PCI Express Clock Gating [Enabled]
Hardware Prefetcher [Enabled]
Adjacent Cache Line Prefetch [Enabled]
Intel (VMX) Virtualization Technology [Disabled]
Per P-Core Control [Disabled]
Per E-Core Control [Disabled]
Active Performance Cores [All]
Active Efficient Cores [All]
Hyper-Threading [Enabled]
Hyper-Threading of Core 0 [Enabled]
Hyper-Threading of Core 1 [Enabled]
Hyper-Threading of Core 2 [Enabled]
Hyper-Threading of Core 3 [Enabled]
Hyper-Threading of Core 4 [Enabled]
Hyper-Threading of Core 5 [Enabled]
Hyper-Threading of Core 6 [Enabled]
Hyper-Threading of Core 7 [Enabled]
Total Memory Encryption [Disabled]
Legacy Game Compatibility Mode [Disabled]
Boot performance mode [Auto]
Intel(R) SpeedStep(tm) [Enabled]
Intel(R) Speed Shift Technology [Disabled]
Turbo Mode [Enabled]
Acoustic Noise Mitigation [Disabled]
CPU C-states [Auto]
Thermal Monitor [Enabled]
Dual Tau Boost [Disabled]
VT-d [Disabled]
Memory Remap [Enabled]
Enable VMD controller [Enabled]
Map PCIE Storage under VMD [Disabled]
Map SATA Controller under VMD [Disabled]
M.2_1 Link Speed [Auto]
PCIEX16(G5)_1 Link Speed [Auto]
PCIEX16(G5)_2 Link Speed [Auto]
PCIEX1(G4) Link Speed [Auto]
PCIEX4(G4) Link Speed [Auto]
M.2_2 Link Speed [Auto]
DIMM.2_1 Link Speed [Auto]
DIMM.2_2 Link Speed [Auto]
SATA Controller(s) [Enabled]
Aggressive LPM Support [Disabled]
SMART Self Test [Enabled]
M.2_3 [Enabled]
M.2_3 Hot Plug [Disabled]
SATA6G_1 [Enabled]
SATA6G_1 Hot Plug [Disabled]
SATA6G_2 [Enabled]
SATA6G_2 Hot Plug [Disabled]
SATA6G_3 [Enabled]
SATA6G_3 Hot Plug [Disabled]
SATA6G_4 [Enabled]
SATA6G_4 Hot Plug [Disabled]
PTT [Enable]
Intel(R) Dynamic Tuning Technology [Disabled]
PCIE Tunneling over USB4 [Enabled]
Discrete Thunderbolt(TM) Support [Disabled]
Security Device Support [Enable]
SHA256 PCR Bank [Enabled]
Pending operation [None]
Platform Hierarchy [Enabled]
Storage Hierarchy [Enabled]
Endorsement Hierarchy [Enabled]
Physical Presence Spec Version [1.3]
Disable Block Sid [Disabled]
Password protection of Runtime Variables [Enable]
Above 4G Decoding [Enabled]
Resize BAR Support [Enabled]
SR-IOV Support [Disabled]
Legacy USB Support [Enabled]
XHCI Hand-off [Enabled]
SanDisk [Auto]
LAN_U32G2_1 [Enabled]
U32G1_E5 [Enabled]
U32G1_E6 [Enabled]
U32G1_E7 [Enabled]
U32G1_E8 [Enabled]
U32G2X2_C3 [Enabled]
U32G2_5 [Enabled]
U32G2_6 [Enabled]
U32G2_7 [Enabled]
U32G2_P8 [Enabled]
U32G2X2_C9 [Enabled]
U32G1_E1 [Enabled]
U32G1_E2 [Enabled]
U32G1_E3 [Enabled]
U32G1_E4 [Enabled]
Network Stack [Disabled]
Device [N/A]
Restore AC Power Loss [Power Off]
Max Power Saving [Disabled]
ErP Ready [Disabled]
Power On By PCI-E [Disabled]
Power On By RTC [Disabled]
USB Audio [Enabled]
Intel LAN [Enabled]
USB power delivery in Soft Off state (S5) [Disabled]
Connectivity mode (Wi-Fi & Bluetooth) [Disabled]
When system is in working state [All On]
Q-Code LED Function [POST Code Only]
When system is in sleep, hibernate or soft off states [All On]
M.2_2 Configuration [Auto]
ASMedia USB 3.2 Controller_U32G1_E12 [Enabled]
ASMedia USB 3.2 Controller_U32G1_E34 [Enabled]
GNA Device [Disabled]
ASMedia Storage Controller [Enabled]
Windows Hot-plug Notification [Disabled]
ASPM Support [Disabled]
CPU Temperature [Monitor]
CPU Package Temperature [Monitor]
MotherBoard Temperature [Monitor]
VRM Temperature [Monitor]
Chipset Temperature [Monitor]
T_Sensor Temperature [Monitor]
DIMM.2 Sensor 1 Temperature [Monitor]
DIMM.2 Sensor 2 Temperature [Monitor]
Water In T Sensor Temperature [Monitor]
Water Out T Sensor Temperature [Monitor]
DIMM A1 Temperature [Monitor]
DIMM B1 Temperature [Monitor]
CPU Fan Speed [Monitor]
CPU Optional Fan Speed [Monitor]
Chassis Fan 1 Speed [Monitor]
Chassis Fan 2 Speed [Monitor]
Chassis Fan 3 Speed [Monitor]
Water Pump+ Speed [Monitor]
AIO Pump Speed [Monitor]
Flow Rate [Monitor]
CPU Core Voltage [Monitor]
12V Voltage [Monitor]
5V Voltage [Monitor]
3.3V Voltage [Monitor]
Memory Controller Voltage [Monitor]
CPU Fan Q-Fan Control [DC Mode]
CPU Fan Profile [Standard]
CPU Fan Q-Fan Source [CPU]
CPU Fan Step Up [Level 0]
CPU Fan Step Down [Level 4]
CPU Fan Speed Low Limit [200 RPM]
Chassis Fan 1 Q-Fan Control [Auto Detect]
Chassis Fan 1 Profile [Standard]
Chassis Fan 1 Q-Fan Source [CPU]
Chassis Fan 1 Step Up [Level 0]
Chassis Fan 1 Step Down [Level 0]
Chassis Fan 1 Speed Low Limit [200 RPM]
Chassis Fan 2 Q-Fan Control [PWM Mode]
Chassis Fan 2 Profile [Standard]
Chassis Fan 2 Q-Fan Source [Chipset]
Chassis Fan 2 Step Up [Level 0]
Chassis Fan 2 Step Down [Level 4]
Chassis Fan 2 Speed Low Limit [200 RPM]
Chassis Fan 3 Q-Fan Control [DC Mode]
Chassis Fan 3 Profile [Silent]
Chassis Fan 3 Q-Fan Source [CPU]
Chassis Fan 3 Step Up [Level 0]
Chassis Fan 3 Step Down [Level 0]
Chassis Fan 3 Speed Low Limit [200 RPM]
Water Pump+ Q-Fan Control [PWM Mode]
Water Pump+ Profile [Manual]
Water Pump+ Q-Fan Source [CPU]
Water Pump+ Step Up [Level 0]
Water Pump+ Step Down [Level 4]
Water Pump+ Speed Low Limit [Ignore]
Water Pump+ Point4 Temperature [70]
Water Pump+ Point4 Duty Cycle (%) [100]
Water Pump+ Point3 Temperature [50]
Water Pump+ Point3 Duty Cycle (%) [85]
Water Pump+ Point2 Temperature [40]
Water Pump+ Point2 Duty Cycle (%) [80]
Water Pump+ Point1 Temperature [25]
Water Pump+ Point1 Duty Cycle (%) [60]
AIO Pump Q-Fan Control [Auto Detect]
AIO Pump Profile [Full Speed]
CPU Temperature LED Switch [Enabled]
Launch CSM [Disabled]
OS Type [Other OS]
Secure Boot Mode [Custom]
Fast Boot [Enabled]
Next Boot after AC Power Loss [Fast Boot]
Boot Logo Display [Auto]
POST Delay Time [3 sec]
Bootup NumLock State [On]
Wait For 'F1' If Error [Enabled]
Option ROM Messages [Force BIOS]
Interrupt 19 Capture [Disabled]
AMI Native NVMe Driver Support [Enabled]
Setup Mode [Advanced Mode]
Boot Sector (MBR/GPT) Recovery Policy [Local User Control]
Next Boot Recovery Action [Skip]
BIOS Image Rollback Support [Enabled]
Publish HII Resources [Disabled]
Flexkey [Safe Boot]
Setup Animator [Disabled]
Load from Profile [7]
Profile Name [test]
Save to Profile [3]
DIMM Slot Number [DIMM_A1]
Download & Install ARMOURY CRATE app [Disabled]
Download & Install MyASUS service & app [Disabled]


57x, 58x ich soll mit CbR23 testen denke ich, weil SFT boostet nie da. Ganz kurz 720 low Spiel getetsted, boosted locker 59x.

Bonus Video, L0 error, zu wenig Vcore fuer SFT

Bonus Bild, TR Benchmark 720 low running. Boosted schoen.

Natuerlich, es ist zu kurz, ich muss laengerer weiter machen/testen, aber ich sehe das Licht in Tunnel :)
 

Anhänge

  • Veii_Setting.jpg
    Veii_Setting.jpg
    136,5 KB · Aufrufe: 79
@Veii

Just registered to say thank you for your work and suggestions.
Since you are not active on OCN I would like to share my latest profile here with you.
Timings are based on your TRFC Mini and suggestions,
CPU is P59x3 58x5 57x8 E45 R45-50, LLC4 AC_ll 0.22 ICCMAX 420A
Dram VDD: 1.56V
Dram VDDQ: 1.45V
TX: 1.30V
MC: 1.50V
SA: 1.18V
Képernyőkép 2024-01-07 141851.png

Képernyőkép 2024-01-07 141858.png
Képernyőkép 2024-01-07 141902.png
Képernyőkép 2024-01-07 141907.png
 
@Veii

Just registered to say thank you for your work and suggestions.
Since you are not active on OCN I would like to share my latest profile here with you.
Timings are based on your TRFC Mini and suggestions,
CPU is P59x3 58x5 57x8 E45 R45-50, LLC4 AC_ll 0.22 ICCMAX 420A
Dram VDD: 1.56V
Dram VDDQ: 1.45V
TX: 1.30V
MC: 1.50V
SA: 1.18V
..welcome here
 
Up to how much vdimm could you go with air? Now I have 1.4850v and the ram is about 32 degrees. I would like to have over 8000mhz but I only see over 1,500v for everything that is that high.

I used to run factory heat shields, have air on my test bench with 140mm 3000RPM fan it worked very well with 1.50v for normal usage, gaming,.. but not for testing @ tREFI 262143, 32-threads,.. need to lower to tREFI 65528, 16 -threads on air for testing.:-)
 
Zuletzt bearbeitet:
@Veii

Heute habe ich leider keine Zeit, aber schwer mich es nicht zu machen. Ganz kurz habe ich zwischen 51x-58x points fuer SFT ausgemacht. 8 Min lang getestet nur, aber wenn es fuer SFT stabil ist, dann genug fuer VST/VT3.
NvExperience schnell installiert, so konnte ich kurz Video machen. Besser wie einen Bild.


Video


[2024/01/07 13:12:25]
Ai Overclock Tuner [Auto]
Intel(R) Adaptive Boost Technology [Auto]
ASUS MultiCore Enhancement [Enabled – Remove All limits (90°C)]
SVID Behavior [Trained]
BCLK Frequency : DRAM Frequency Ratio [100:100]
Memory Controller : DRAM Frequency Ratio [1:2]
DRAM Frequency [DDR5-7200MHz]
Performance Core Ratio [Auto]
Performance Core0 Specific Ratio Limit [Auto]
Performance Core0 specific Voltage [Auto]
Performance Core1 Specific Ratio Limit [Auto]
Performance Core1 specific Voltage [Auto]
*Performance Core2 Specific Ratio Limit [Auto]
Performance Core2 specific Voltage [Auto]
*Performance Core3 Specific Ratio Limit [Auto]
Performance Core3 specific Voltage [Auto]
Performance Core4 Specific Ratio Limit [Auto]
Performance Core4 specific Voltage [Auto]
Performance Core5 Specific Ratio Limit [Auto]
Performance Core5 specific Voltage [Auto]
Performance Core6 Specific Ratio Limit [Auto]
Performance Core6 specific Voltage [Auto]
Performance Core7 Specific Ratio Limit [Auto]
Performance Core7 specific Voltage [Auto]
Efficient Core Ratio [Auto]
Efficient Core Group0 Specific Ratio Limit [Auto]
Efficient Core Group0 specific Voltage [Auto]
Efficient Core Group1 Specific Ratio Limit [Auto]
Efficient Core Group1 specific Voltage [Auto]
Efficient Core Group2 Specific Ratio Limit [Auto]
Efficient Core Group2 specific Voltage [Auto]
Efficient Core Group3 Specific Ratio Limit [Auto]
Efficient Core Group3 specific Voltage [Auto]
AVX2 [Auto]
AVX2 Ratio Offset to per-core Ratio Limit [Auto]
AVX2 Voltage Guardband Scale Factor [Auto]
Maximus Tweak [Mode 2]
DRAM CAS# Latency [32]
DRAM RAS# to CAS# Delay Read [42]
DRAM RAS# to CAS# Delay Write [16]
DRAM RAS# PRE Time [42]
DRAM RAS# ACT Time [54]
DRAM Command Rate [2N]
DRAM RAS# to RAS# Delay L [12]
DRAM RAS# to RAS# Delay S [8]
DRAM REF Cycle Time 2 [448]
DRAM REF Cycle Time Same Bank [Auto]
DRAM Refresh Interval [131071]
DRAM WRITE Recovery Time [24]
DRAM READ to PRE Time [12]
DRAM FOUR ACT WIN Time [32]
DRAM WRITE to READ Delay L [24]
DRAM WRITE to READ Delay S [10]
DRAM CKE Minimum Pulse Width [Auto]
DRAM Write Latency [30]
Ctl0 dqvrefup [154]
Ctl0 dqvrefdn [72]
Ctl0 dqodtvrefup [Auto]
Ctl0 dqodtvrefdn [Auto]
Ctl1 cmdvrefup [Auto]
Ctl1 ctlvrefup [Auto]
Ctl1 clkvrefup [Auto]
Ctl1 ckecsvrefup [Auto]
Ctl2 cmdvrefdn [Auto]
Ctl2 ctlvrefdn [Auto]
Ctl2 clkvrefdn [Auto]
Read Equalization RxEq Start Sign [-]
Read Equalization RxEq Start [Auto]
Read Equalization RxEq Stop Sign [-]
Read Equalization RxEq Stop [Auto]
ODT_READ_DURATION [Auto]
ODT_READ_DELAY [Auto]
ODT_WRITE_DURATION [Auto]
ODT_WRITE_DELAY [Auto]
DQ RTT WR [40 DRAM Clock]
DQ RTT NOM RD [40 DRAM Clock]
DQ RTT NOM WR [40 DRAM Clock]
DQ RTT PARK [34 DRAM Clock]
DQ RTT PARK DQS [34 DRAM Clock]
GroupA CA ODT [240 DRAM Clock]
GroupA CS ODT [0 DRAM Clock]
GroupA CK ODT [0 DRAM Clock]
GroupB CA ODT [60 DRAM Clock]
GroupB CS ODT [40 DRAM Clock]
GroupB CK ODT [40 DRAM Clock]
Pull-up Output Driver Impedance [34 DRAM Clock]
Pull-Down Output Driver Impedance [34 DRAM Clock]
DQ RTT WR [40 DRAM Clock]
DQ RTT NOM RD [40 DRAM Clock]
DQ RTT NOM WR [40 DRAM Clock]
DQ RTT PARK [34 DRAM Clock]
DQ RTT PARK DQS [34 DRAM Clock]
GroupA CA ODT [240 DRAM Clock]
GroupA CS ODT [0 DRAM Clock]
GroupA CK ODT [0 DRAM Clock]
GroupB CA ODT [60 DRAM Clock]
GroupB CS ODT [40 DRAM Clock]
GroupB CK ODT [40 DRAM Clock]
Pull-up Output Driver Impedance [34 DRAM Clock]
Pull-Down Output Driver Impedance [34 DRAM Clock]
Round Trip Latency Init Value MC0 CHA [Auto]
Round Trip Latency Max Value MC0 CHA [Auto]
Round Trip Latency Offset Value Mode Sign MC0 CHA [-]
Round Trip Latency Offset Value MC0 CHA [Auto]
Round Trip Latency Init Value MC0 CHB [Auto]
Round Trip Latency Max Value MC0 CHB [Auto]
Round Trip Latency Offset Value Mode Sign MC0 CHB [-]
Round Trip Latency Offset Value MC0 CHB [Auto]
Round Trip Latency Init Value MC1 CHA [Auto]
Round Trip Latency Max Value MC1 CHA [Auto]
Round Trip Latency Offset Value Mode Sign MC1 CHA [-]
Round Trip Latency Offset Value MC1 CHA [Auto]
Round Trip Latency Init Value MC1 CHB [Auto]
Round Trip Latency Max Value MC1 CHB [Auto]
Round Trip Latency Offset Value Mode Sign MC1 CHB [-]
Round Trip Latency Offset Value MC1 CHB [Auto]
Round Trip Latency MC0 CHA R0 [Auto]
Round Trip Latency MC0 CHA R1 [Auto]
Round Trip Latency MC0 CHA R2 [0]
Round Trip Latency MC0 CHA R3 [0]
Round Trip Latency MC0 CHA R4 [0]
Round Trip Latency MC0 CHA R5 [0]
Round Trip Latency MC0 CHA R6 [0]
Round Trip Latency MC0 CHA R7 [0]
Round Trip Latency MC0 CHB R0 [Auto]
Round Trip Latency MC0 CHB R1 [Auto]
Round Trip Latency MC0 CHB R2 [0]
Round Trip Latency MC0 CHB R3 [0]
Round Trip Latency MC0 CHB R4 [0]
Round Trip Latency MC0 CHB R5 [0]
Round Trip Latency MC0 CHB R6 [0]
Round Trip Latency MC0 CHB R7 [0]
Round Trip Latency MC1 CHA R0 [Auto]
Round Trip Latency MC1 CHA R1 [Auto]
Round Trip Latency MC1 CHA R2 [0]
Round Trip Latency MC1 CHA R3 [0]
Round Trip Latency MC1 CHA R4 [0]
Round Trip Latency MC1 CHA R5 [0]
Round Trip Latency MC1 CHA R6 [0]
Round Trip Latency MC1 CHA R7 [0]
Round Trip Latency MC1 CHB R0 [Auto]
Round Trip Latency MC1 CHB R1 [Auto]
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Round Trip Latency MC1 CHB R3 [0]
Round Trip Latency MC1 CHB R4 [0]
Round Trip Latency MC1 CHB R5 [0]
Round Trip Latency MC1 CHB R6 [0]
Round Trip Latency MC1 CHB R7 [0]
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SenseAmp Offset Training [Auto]
Early ReadMPR Timing Centering 2D [Auto]
Read MPR Training [Auto]
Receive Enable Training [Auto]
Jedec Write Leveling [Auto]
Early Write Time Centering 2D [Auto]
Early Read Time Centering 2D [Auto]
Write Timing Centering 1D [Auto]
Write Voltage Centering 1D [Auto]
Read Timing Centering 1D [Auto]
Read Timing Centering with JR [Auto]
Dimm ODT Training* [Disabled]
Max RTT_WR [ODT Off]
DIMM RON Training* [Disabled]
Write Drive Strength/Equalization 2D* [Auto]
Write Slew Rate Training* [Auto]
Read ODT Training* [Disabled]
Comp Optimization Training [Auto]
Read Equalization Training* [Auto]
Read Amplifier Training* [Auto]
Write Timing Centering 2D [Auto]
Read Timing Centering 2D [Auto]
Command Voltage Centering [Auto]
Early Command Voltage Centering [Auto]
Write Voltage Centering 2D [Auto]
Read Voltage Centering 2D [Auto]
Late Command Training [Auto]
Round Trip Latency [Auto]
Turn Around Timing Training [Auto]
CMD CTL CLK Slew Rate [Auto]
CMD/CTL DS & E 2D [Auto]
Read Voltage Centering 1D [Auto]
TxDqTCO Comp Training* [Auto]
ClkTCO Comp Training* [Auto]
TxDqsTCO Comp Training* [Auto]
VccDLL Bypass Training [Auto]
CMD/CTL Drive Strength Up/Dn 2D [Auto]
DIMM CA ODT Training [Auto]
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Read Vref Decap Training* [Auto]
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Duty Cycle Correction Training [Auto]
Periodic DCC [Auto]
Rank Margin Tool Per Bit [Auto]
DIMM DFE Training [Auto]
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Tx Dqs Dcc Training [Auto]
DRAM DCA Training [Auto]
Write Driver Strength Training [Auto]
Rank Margin Tool [Auto]
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Receive Enable Centering 1D [Auto]
Retrain Margin Check [Auto]
Write Drive Strength Up/Dn independently [Auto]
LPDDR DqDqs Re-Training [Auto]
Margin Check Limit [Disabled]
tRDRD_sg_Training [Auto]
tRDRD_sg_Runtime [16]
tRDRD_dg_Training [Auto]
tRDRD_dg_Runtime [8]
tRDWR_sg [18]
tRDWR_dg [18]
tWRWR_sg [16]
tWRWR_dg [8]
tWRRD_sg [Auto]
tWRRD_dg [Auto]
tRDRD_dr [0]
tRDRD_dd [Auto]
tRDWR_dr [0]
tRDWR_dd [Auto]
tWRWR_dr [0]
tWRWR_dd [Auto]
tWRRD_dr [0]
tWRRD_dd [Auto]
tRPRE [Auto]
tWPRE [Auto]
tWPOST [Auto]
tWRPRE [Auto]
tPRPDEN [Auto]
tRDPDEN [Auto]
tWRPDEN [Auto]
tCPDED [Auto]
tREFIX9 [Auto]
Ref Interval [Auto]
tXPDLL [Auto]
tXP [Auto]
tPPD [Auto]
tCCD_L_tDLLK [Auto]
tZQCAL [Auto]
tZQCS [Auto]
OREF_RI [Auto]
Refresh Watermarks [High]
Refresh Hp Wm [Auto]
Refresh Panic Wm [Auto]
Refresh Abr Release [Auto]
tXSDLL [Auto]
tZQOPER [Auto]
tMOD [Auto]
CounttREFIWhileRefEn [Auto]
HPRefOnMRS [Auto]
SRX Ref Debits [Auto]
RAISE BLK WAIT [Auto]
Ref Stagger En [Auto]
Ref Stagger Mode [Auto]
Disable Stolen Refresh [Auto]
En Ref Type Display [Auto]
Trefipulse Stagger Disable [Auto]
tRPab ext [Auto]
derating ext [Auto]
Allow 2cyc B2B LPDDR [Auto]
tCSH [Auto]
tCSL [Auto]
powerdown Enable [Auto]
idle length [Auto]
raise cke after exit latency [Auto]
powerdown latency [Auto]
powerdown length [Auto]
selfrefresh latency [Auto]
selfrefresh length [Auto]
ckevalid length [Auto]
ckevalid enable [Auto]
idle enable [Auto]
selfrefresh enable [Auto]
Address mirror [Auto]
no gear4 param divide [Auto]
x8 device [Auto]
no gear2 param divide [Auto]
ddr 1dpc split ranks on subch [Auto]
write0 enable [Auto]
MultiCycCmd [Auto]
WCKDiffLowInIdle [Auto]
PBR Disable [Auto]
PBR OOO Dis [Auto]
PBR Disable on hot [Auto]
PBR Exit on Idle Cnt [Auto]
tXSR [Auto]
Dec tCWL [Auto]
Add tCWL [Auto]
Add 1Qclk delay [Auto]
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MCH Full Check [Auto]
Mem Over Clock Fail Count [2]
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Controller 0, Channel 0 Control [Enabled]
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MC_Vref2 [Auto]
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Voltage Monitor [Die Sense]
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CPU Power Thermal Control [125]
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IVR Transmitter VDDQ ICCMAX [Auto]
Unlimited ICCMAX [Auto]
CPU Core/Cache Current Limit Max. [420.00]
Long Duration Package Power Limit [Auto]
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Short Duration Package Power Limit [Auto]
Dual Tau Boost [Disabled]
IA AC Load Line [0.30]
IA DC Load Line [Auto]
IA CEP Enable [Disabled]
SA CEP Enable [Disabled]
IA SoC Iccmax Reactive Protector [Auto]
Inverse Temperature Dependency Throttle [Auto]
IA VR Voltage Limit [1650]
CPU SVID Support [Auto]
Cache Dynamic OC Switcher [Auto]
TVB Voltage Optimizations [Enabled]
Enhanced TVB [Enabled]
Overclocking TVB [Boost Until Target]
Max Boost Target in MHz [Auto]
Overclocking TVB Global Temperature Offset Sign [+]
Overclocking TVB Global Temperature Offset Value [Auto]
Offset Mode Sign 1 [+]
V/F Point 1 Offset [Auto]
Offset Mode Sign 2 [+]
V/F Point 2 Offset [Auto]
Offset Mode Sign 3 [+]
V/F Point 3 Offset [Auto]
Offset Mode Sign 4 [+]
V/F Point 4 Offset [Auto]
Offset Mode Sign 5 [-]
V/F Point 5 Offset [0.01000]
Offset Mode Sign 6 [-]
V/F Point 6 Offset [0.02500]
Offset Mode Sign 7 [-]
V/F Point 7 Offset [0.02600]
Offset Mode Sign 8 [-]
V/F Point 8 Offset [0.02800]
Offset Mode Sign 9 [-]
V/F Point 9 Offset [0.03000]
Offset Mode Sign 10 [-]
V/F Point 10 Offset [0.03400]
Offset Mode Sign 11 [-]
V/F Point 11 Offset [0.03500]
Initial BCLK Frequency [Auto]
Runtime BCLK OC [Auto]
BCLK Amplitude [Auto]
BCLK Slew Rate [Auto]
BCLK Spread Spectrum [Auto]
Initial PCIE Frequency [Auto]
PCIE/DMI Amplitude [Auto]
PCIE/DMI Slew Rate [Auto]
PCIE/DMI Spread Spectrum [Auto]
Cold Boot PCIE Frequency [Auto]
Realtime Memory Timing [Disabled]
SPD Write Disable [TRUE]
PVD Ratio Threshold [Auto]
SA PLL Frequency Override [Auto]
BCLK TSC HW Fixup [Enabled]
Core Ratio Extension Mode [Disabled]
FLL OC mode [Auto]
UnderVolt Protection [Disabled]
Switch Microcode [Current Microcode]
Xtreme Tweaking [Disabled]
Core PLL Voltage [Auto]
GT PLL Voltage [Auto]
Ring PLL Voltage [Auto]
System Agent PLL Voltage [Auto]
Memory Controller PLL Voltage [Auto]
Efficient-core PLL Voltage [Auto]
CPU 1.8V Small Rail [Auto]
PLL Termination Voltage [Auto]
CPU Standby Voltage [Auto]
PCH 1.05V Voltage [Auto]
PCH 0.82V Voltage [Auto]
CPU Input Voltage Reset Voltage [Auto]
Eventual CPU Input Voltage [Auto]
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Package Temperature Threshold [Auto]
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Cooler Efficiency Customize [Keep Training]
Cooler Re-evaluation Algorithm [Normal]
Optimism Scale [100]
Ring Down Bin [Auto]
Min. CPU Cache Ratio [Auto]
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BCLK Aware Adaptive Voltage [Auto]
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Global Core SVID Voltage [Auto]
Cache SVID Voltage [Auto]
CPU L2 Voltage [Auto]
CPU System Agent Voltage [Manual Mode]
- CPU System Agent Voltage Override [1.12000]
CPU Input Voltage [Auto]
High DRAM Voltage Mode [Enabled]
DRAM VDD Voltage [1.45000]
DRAM VDDQ Voltage [1.43000]
IVR Transmitter VDDQ Voltage [1.24000]
Memory Controller Voltage [1.21250]
MC Voltage Calculation Voltage Base [Auto]
VDD Calculation Voltage Base [Auto]
PMIC Voltages [Auto]
PCI Express Native Power Management [Enabled]
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DMI Link ASPM Control [Disabled]
ASPM [Auto]
L1 Substates [Disabled]
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PEG - ASPM [Disabled]
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CPU C-states [Auto]
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VT-d [Disabled]
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PTT [Enable]
Intel(R) Dynamic Tuning Technology [Disabled]
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Device [N/A]
Restore AC Power Loss [Power Off]
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USB Audio [Enabled]
Intel LAN [Enabled]
USB power delivery in Soft Off state (S5) [Disabled]
Connectivity mode (Wi-Fi & Bluetooth) [Disabled]
When system is in working state [All On]
Q-Code LED Function [POST Code Only]
When system is in sleep, hibernate or soft off states [All On]
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GNA Device [Disabled]
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CPU Package Temperature [Monitor]
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57x, 58x ich soll mit CbR23 testen denke ich, weil SFT boostet nie da. Ganz kurz 720 low Spiel getetsted, boosted locker 59x.

Bonus Video, L0 error, zu wenig Vcore fuer SFT

Bonus Bild, TR Benchmark 720 low running. Boosted schoen.

Natuerlich, es ist zu kurz, ich muss laengerer weiter machen/testen, aber ich sehe das Licht in Tunnel :)
Es ist nicht so schlegt. Benched paar Benchmark auf diesem 24/7 Setup, ohne Tricks (HT Off usw.), zeigt gut. 280 min fps TR Bench, 180 min fps CP77, 45 sec 2.5b, finde ich gut. Ich schaue nur min fps.
Na ja, schau mal 8000 wie gehts... nicht so viele Chance. 7200MHz mit low Spannungen gehts einmal frei.
P8-P11 sind noch nicht fertig, werde ich es weiter testen. Gaming Benches sind alle 59xP, 44xE u. 45xR laufen gegangen. Alles auto. Ergebnis sind nicht so schlegt, nicht so gut ;) Keine OC waren. Rebar, HT, HAGS waren an.
 

Anhänge

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Bonus Video, L0 error, zu wenig Vcore fuer SFT
1704656360095.png

EDIT: ^ manually write, soo it recomputes 3 times the curve. Order is important.
Manually writing sets anchor points ~ input done result in bios &/or illustrate first via Curve illustration your changes.
To visually check on curve too. Near 5.5GHz point "feels" strange. Good to see visually the change.

I see some little issue, but i think its not curve related
Between 5.5 & 5.6 strap is not clean.

This target field is a good roundup, but for own sheet tracking ~ the "V/F Curve" GUI one
Is better than your "V/F Monitor" thing.
That monitor one is used to track clock drops but ring will make it harder to notice.

Ring itself i am slightly worried, as we drop core voltage bellow ring.
I've seen menu's for GT/Core/Ring ~ V/F menu's
But its not there for consumer bioses.
Afraid ring & e-cores will take too much voltage, bothering core.
L0$ is in cores tho. But can not fully exclude ring issues.

Can you make sure ring-downbin stays enabled ?
We will hit ICCMAX with it, soo of course it throttles more.

Not happy with behavior on 5.5-5.6 allcore load "curve".
Afraid we need go higher on IA DC ~ like .35 instead and stronger droop on V/F Points.
This all is a bit too fine atm.

Are you ok with 6.2 boost on this little voltage ?
Please put both geekbenches and benchmate y-cruncher inside, to test single thread efficiency.
DieSense is "target" . But its not reality. Its just target.

Can you figure me out where this is coming from
1704656741164.png

I have a feeling ring needs negative voltage, because you have zero ability to modify V/F of it // hidden in bios
Shamino's tool does have write access, but only till next cmos reset.
You can do some TVB boost exploit , yet still no access to ring V/F.
Afraid it is what bothers, so we maybe need higher input and stronger cores curve drop.


Another interesting thing :)
Your 5.7 fixed? TVB are quite throttling.
Kv0jwyIeoS.png
oKgiYggO2c.png

vs
mb7JKOaBzm.png
1704657681119.png

Not fully apples to apples & VT3 is too dynamic load, to track voltage on
But at same fixed voltage and + "200MHz" fixed more, you compute to nearly the same ~ actually slower.
And if we go clock to clock, quite a bit slower.
It could be ring , it could be due to high internal UncoreVID ~ unsure , but Intel's designed algo way, is just faster
(same on AMD, work with the CPU not against it 🤭)

Bit surprised to see it IOPS throttling on OC_MODE that much (fixed clock)
But oh well :)
EDIT: ^ Thinking/Recognition mistake. This is not fixed clock.

Beitrag automatisch zusammengeführt:

But at same fixed voltage and + "200MHz" fixed more, you compute to nearly the same ~ actually slower.
And if we go clock to clock, quite a bit slower.
Wait, was this just no curve work 5.7 , or just IA DC 0.01 - causing high effective "fake" clock ?
Screenshot doesnt look like fixed clock ~ i have a thinking mistake.

Any case, its throttling and matching 200MHz lower clock , for compute ability.
@zebra_hun
P11 gets ignored, because highest voltage wins ~ P11 droops too much.
// Use P10 as starting point input, P11 you can correct then. Any input corrects lower curve points.
Soo what mV you input is not so important, what comes out is.
Should verify Curve after reboot, because reboot retrains too.
All are just offsets.

Catch curve instability with more programs
And throttle. Like i did~
VT3 is dynamic, but not useful for this sort of tracking.
 
Zuletzt bearbeitet:
I still need to work on the V/F points, but I thought I'd show you where I'm at and how I started.
I think I reach the limit at this point "CPU Core/Cache Current Limit Max. [420.00]" and here it switches between 55x and 56x under SFT. For example, during a Cinebench it is permanently 57x, as it is a small load. Maybe the temperature limit at the same time. "ASUS MultiCore Enhancement [Enabled – Remove All limits (90°C)]"
Can you figure me out where this is coming from
1704656741164.png
This is V/F Curve. HWINFO shows here. Always it shows the max value.

V/F Point 1 Offset [Auto]
Offset Mode Sign 2 [+]
V/F Point 2 Offset [Auto]
Offset Mode Sign 3 [+]
V/F Point 3 Offset [Auto]
Offset Mode Sign 4 [+]
V/F Point 4 Offset [Auto]
Offset Mode Sign 5 [-]
V/F Point 5 Offset [0.01000]
Offset Mode Sign 6 [-]
V/F Point 6 Offset [0.02500]
Offset Mode Sign 7 [-]
V/F Point 7 Offset [0.02600]
Offset Mode Sign 8 [-]
V/F Point 8 Offset [0.02800]
Offset Mode Sign 9 [-]
V/F Point 9 Offset [0.03000]
Offset Mode Sign 10 [-]
V/F Point 10 Offset [0.03400]
Offset Mode Sign 11 [-]
V/F Point 11 Offset [0.03500]

Copied from BIOS .txt, whole test was on this Curve in BIOS. It was entered directly, I only showed Shamino Tools as a check. Wrong, i know yet. I will change it later.
For the Ring theme.
If I leave everything on auto, then 45x. If I enter the max value manually, it will be what I entered, and I don't get a limit either, even though it's a higher frequency.
RDB-Enabled-AUTO-.jpg


RDB-Enabled-AUTO.jpg


RDB-Enabled-AUTO-49-.jpg


RDB-Enabled-AUTO-49.jpg


GB3 45x

GB3 49x

I don't know, what is PL4 limit, but i think better, if it isn't there. Auto=45x and PL4 limit, manual 49x=49x and no PL4 limit.

Catch curve instability with more programs
And throttle. Like i did~
VT3 is dynamic, but not useful for this sort of tracking.

I will do that. All games, lite load, are boosted to 59x, I will only be able to test them with lite load.
What convinced me is that it doesn't boil over, burn, and regulates nicely, even under extremely high loads. Unfortunately, because I see other 14900k cpu's, I need ~100mV extra, so I'll reach the limit sooner. This is what I have, this is what I have to accept.
Another thing that I don't fully understand when you write that there is no fixed frequency and fixed Vcore.
I haven't used it yet, I only entered the max frequency. I have determined that it cannot go above a certain value. It is well regulated between 800-5500MHz and the voltage is ~0.6V-1.15V depending on the load. It was not fixed, a constant 55x plus the fixed voltage. This is how it used to work, this is my old 13700k cpu.

13700k Cb R23 run

Is it that dangerous? I am aware that I lose a little power, but it still has a lot of power, but it remains very cool.
Since I have a 3080ti GPU, maximum performance doesn't really matter. My monitor is 165Hz/1440px, 162 cpu fps is enough for me.
I bought this DDR5/14900k PC to learn, so it's great that you help show me the new ones. That's why I'm satisfied with this 7200MHz RAM OC, since every game has more cpu fps than 162, which I limit to. There is one very important thing that it should be stable. Of course, a stable 8000C36 would be better, but we'll see.

Thank you for everything, have a nice day! I'll report back if I have something to show.
 
Another thing that I don't fully understand when you write that there is no fixed frequency and fixed Vcore.
I made a thinking mistake, because the behavior looked like fixed clock - and the throttle too when i compared load and profiles

What i certainly didnt expect, is hitting ICCMAX on SFT. SFT is not very ring or mem heavy, soo it was strange.
What i'm not happy about is also that it has the same name between categories.

Ring VR max is ring V/F hitting voltage max. Like the voltage max you set for Curve V/F ~ 1500 was a good cap
I could be wrong but dont think that this one does go over Ring or GT.
What i'm also not sure and it would be strange ~ if enabling unlimited ICCMAX (as that part also captures for IMC soo DDR)
Plus manual core ICCMAX ~ if it overrides core ICCMAX.
It would be strange behavior, but its also strange to have lack of access on other ICCMAX.

For your cooling, going over 400A shouldn't be a too big issue ~ but its over the specs.
And it definitely matches high power and may degrade faster.

I'll think about it and answer next time better.
This is V/F Curve. HWINFO shows here. Always it shows the max value.
For my experience, bizarre. Very.
It could be that i never noticed, but i am very not sure.
Lets leave it at that :)
I will do that. All games, lite load, are boosted to 59x, I will only be able to test them with lite load.
What convinced me is that it doesn't boil over, burn, and regulates nicely, even under extremely high loads. Unfortunately, because I see other 14900k cpu's, I need ~100mV extra, so I'll reach the limit sooner. This is what I have, this is what I have to accept.
We will see what works.
There are 3 values to track
DieSense is basically not important. Lower the better. Its an endproduct from several factors.
Core V/F curve is unique
And whole CPU V/F curve is unique.
// We have fused core curve, that gets trained and matched to LLCs, which we influence
// to influence whole CPU V/F
// to hopefully allow SVID to be more preservative and undervolt
// while leaving headroom for the rest
// yet not hitting ICCMAX. Or at very least not on the cores portion, ring can stay dynamic with downbin ability.
// to also not hit those limiters bothering on memOC ~ because memOC is affected by them too


// On the contrary, if your CPU had more core VID margins and not nearly hit 1.5, work would be easier. But it is what it is.
// And if we just run unlimited ICCMAX, you basically ask for fast degradation. Guess you need to work a bit harder on this difficult sample, if you want OC margins. 🤭


It throttles on whole V/F curve reaching higher VR requests.
Soo some voltage offsetting needs to be done.

I would say higher input (bit more IA AC, because you already reach ICCMAX and also VR-MAX
And core V/F further down (more UV). Also to fix that cache instability and leave voltage margins for it.

What i may also try before doing anything else;
If running ICCMAX to lets say 450A instead 400A
Fixes those cache & ring instabilities. Or it just was a curve issue.
As on the early videos you could see something capping voltage supply.
Looked like guardbands but it didnt act that way. Vout was the same yet VID behaved odd till ultimately cache threw whea.
Soo supply by itself was low from my understanding. Aka IA DC was too strong, needs to go up to 0.35 and curve itself was not the blame for cutting voltage to cache

As usual, lower ring strap - lower vid, not reaching VR-MAX
I would love to have access to that V/F, but i think that V/F is a result of core V/F too. Rather E-Core part.
I think its not possible to completely isolate it due to LDO's, hence its missing from bios.
Could be wrong and its just no access for consumer~~


1704698116712.png

This can and will be annoying. And can and will bother for max-mem OC
But there are tricks for this.
its just very unfortunate that this is in same IA supply which mainly your cores V/F are to blame.

Soo maybe maybe, going this way (higher AC DC) and much stronger curve droop.
Could balance thing out.
We will have side-effect issues tho for ring and cache. Always have to watch out.

Please try to undervolt curve as much as possible before 5.5 and then check your game boost.
Ignore the DieSense "voltage" it says on Tool.exe. Its just the curve and real voltage supplied has more variables in it.
But we need to get curve further down and try to not create voltage struggle situation on +6GHz boost.

TM5 is allcore SSE load
Games are usually 2-3 core SSE loads most of the times
https://drive.google.com/file/d/1vG6cHcK59aYiqvVlVHK73JpksjOyWs9z/view Boosttester may work to test maxboost (voltage) on weak load
OCCT can do per core AVX and SSE ? i think , loads.
Benchmate y-cruncher should be weak singlecore load.
Ah y-cruncher FFT , can be isolated to one core or many cores. That's SSE too if i remember correctly and maxes out ring+has mem priority.

You'll figure it out, just start tracking perf results, when working with curve. Try to not have negative result even if thermals will improve.
 
Zuletzt bearbeitet:
OFF:

@Veii:

Ich habe mit V/F ganz kurz gespielt.
Aber ein sehr wichtig Ding.
Normalle weisse ein 14900k ist +200MHz fuer 13900k(s). Mein leaky 14900k=13900k (allgemein)
Deswegen habe ich es wie ein 13900k eingestellt. Ich habe kein PL4 limit. (Unten in Video einmal erwischt...)
Total umgebaut. Die Spannungen flexible, Frequez auch.

800MHz-5500MHz alle 8 Kerne. Bis 5800MHz kann zwei Kerne boosten. Plus noch dazu TVB. So gehts gut. (Ich bin neu mit TVB, nie benutzt)
SFT allcore 5500, VST, VT3, CbR23 5600, manchmal 5700MHz. Games 5700MHz.

Schoene Curve ist nicht so einfach einstellen. Zwischen 800- ~2000Mhz habe ich ein "Loch". 0 offset in V/F menu da gegeben, aber doch tiefer. Es muss ich noch irgendwie schoener machen.
Egal, werde ich es repaieren.
Vcore fuer SFT eingestellt, bedeutet es ist genug viel. Ich wollte kurz status update machen.
Diese 100MHz das ich verlore intressiert mich nicht sehr, auf diesem Frequenz gehts leicht fuer meinen cpu. Wie einen 13900k.

Test 1: VST/VT3 allcore 5600MHz + Curve Bild. Haesslich ich weiss, wo idle ist. (1.18* 10*10 VST, 1.38* 10*10 VT3)
Test 2: Cinebench R23 5600MHz
Test 3: 1 Core 2 Thread 5900-6000MHz

Ueberalle TVB aktiv. Sie waren kurz ich weiss, aber vorher SFT 10 Min lang getested, Vcore muss genug sein. Irgendwie wird es spaeter besser ausschauen, nur schoener muss sein :)
Ich dachte die Curve mache ich schnell, aber nur ich dachte...
1 Core 2 Thread Test habe ich kurz Video gemacht, weil mein W10 ist hacked Power Plan hat, schaut nicht so gut aus. W11 ist normal mit Balanced Power Plan. Da ist Core Clock sind normal.

1 Core Boost Test Video

Langsam ich kann RAM OC weiter machen, aber ich denke, dass 8000MHz wird nie stabil sein...

Wenn diese BIOS Settings sehen moechtest, hier ist:
[2024/01/08 21:27:57]
Ai Overclock Tuner [Auto]
Intel(R) Adaptive Boost Technology [Auto]
ASUS MultiCore Enhancement [Enabled – Remove All limits (90°C)]
SVID Behavior [Trained]
BCLK Frequency : DRAM Frequency Ratio [100:100]
Memory Controller : DRAM Frequency Ratio [1:2]
DRAM Frequency [DDR5-7200MHz]
Performance Core Ratio [By Core Usage]
1-Core Ratio Limit [58]
2-Core Ratio Limit [58]
3-Core Ratio Limit [57]
4-Core Ratio Limit [57]
5-Core Ratio Limit [56]
6-Core Ratio Limit [56]
7-Core Ratio Limit [55]
8-Core Ratio Limit [55]
Performance Core0 Specific Ratio Limit [Auto]
Performance Core0 specific Voltage [Auto]
Performance Core1 Specific Ratio Limit [Auto]
Performance Core1 specific Voltage [Auto]
*Performance Core2 Specific Ratio Limit [Auto]
Performance Core2 specific Voltage [Auto]
*Performance Core3 Specific Ratio Limit [Auto]
Performance Core3 specific Voltage [Auto]
Performance Core4 Specific Ratio Limit [Auto]
Performance Core4 specific Voltage [Auto]
Performance Core5 Specific Ratio Limit [Auto]
Performance Core5 specific Voltage [Auto]
Performance Core6 Specific Ratio Limit [Auto]
Performance Core6 specific Voltage [Auto]
Performance Core7 Specific Ratio Limit [Auto]
Performance Core7 specific Voltage [Auto]
Efficient Core Ratio [By Core Usage]
Efficient Turbo Ratio Limit 1 [44]
Efficient Turbo Ratio Cores 1 [Auto]
Efficient Core Group0 Specific Ratio Limit [Auto]
Efficient Core Group0 specific Voltage [Auto]
Efficient Core Group1 Specific Ratio Limit [Auto]
Efficient Core Group1 specific Voltage [Auto]
Efficient Core Group2 Specific Ratio Limit [Auto]
Efficient Core Group2 specific Voltage [Auto]
Efficient Core Group3 Specific Ratio Limit [Auto]
Efficient Core Group3 specific Voltage [Auto]
AVX2 [Auto]
AVX2 Ratio Offset to per-core Ratio Limit [Auto]
AVX2 Voltage Guardband Scale Factor [Auto]
Maximus Tweak [Mode 2]
DRAM CAS# Latency [32]
DRAM RAS# to CAS# Delay Read [42]
DRAM RAS# to CAS# Delay Write [16]
DRAM RAS# PRE Time [42]
DRAM RAS# ACT Time [54]
DRAM Command Rate [2N]
DRAM RAS# to RAS# Delay L [12]
DRAM RAS# to RAS# Delay S [8]
DRAM REF Cycle Time 2 [448]
DRAM REF Cycle Time Same Bank [Auto]
DRAM Refresh Interval [131071]
DRAM WRITE Recovery Time [24]
DRAM READ to PRE Time [12]
DRAM FOUR ACT WIN Time [32]
DRAM WRITE to READ Delay L [24]
DRAM WRITE to READ Delay S [10]
DRAM CKE Minimum Pulse Width [Auto]
DRAM Write Latency [30]
Ctl0 dqvrefup [154]
Ctl0 dqvrefdn [72]
Ctl0 dqodtvrefup [Auto]
Ctl0 dqodtvrefdn [Auto]
Ctl1 cmdvrefup [Auto]
Ctl1 ctlvrefup [Auto]
Ctl1 clkvrefup [Auto]
Ctl1 ckecsvrefup [Auto]
Ctl2 cmdvrefdn [Auto]
Ctl2 ctlvrefdn [Auto]
Ctl2 clkvrefdn [Auto]
Read Equalization RxEq Start Sign [-]
Read Equalization RxEq Start [Auto]
Read Equalization RxEq Stop Sign [-]
Read Equalization RxEq Stop [Auto]
ODT_READ_DURATION [Auto]
ODT_READ_DELAY [Auto]
ODT_WRITE_DURATION [Auto]
ODT_WRITE_DELAY [Auto]
DQ RTT WR [40 DRAM Clock]
DQ RTT NOM RD [40 DRAM Clock]
DQ RTT NOM WR [40 DRAM Clock]
DQ RTT PARK [34 DRAM Clock]
DQ RTT PARK DQS [34 DRAM Clock]
GroupA CA ODT [240 DRAM Clock]
GroupA CS ODT [0 DRAM Clock]
GroupA CK ODT [0 DRAM Clock]
GroupB CA ODT [60 DRAM Clock]
GroupB CS ODT [40 DRAM Clock]
GroupB CK ODT [40 DRAM Clock]
Pull-up Output Driver Impedance [34 DRAM Clock]
Pull-Down Output Driver Impedance [34 DRAM Clock]
DQ RTT WR [40 DRAM Clock]
DQ RTT NOM RD [40 DRAM Clock]
DQ RTT NOM WR [40 DRAM Clock]
DQ RTT PARK [34 DRAM Clock]
DQ RTT PARK DQS [34 DRAM Clock]
GroupA CA ODT [240 DRAM Clock]
GroupA CS ODT [0 DRAM Clock]
GroupA CK ODT [0 DRAM Clock]
GroupB CA ODT [60 DRAM Clock]
GroupB CS ODT [40 DRAM Clock]
GroupB CK ODT [40 DRAM Clock]
Pull-up Output Driver Impedance [34 DRAM Clock]
Pull-Down Output Driver Impedance [34 DRAM Clock]
Round Trip Latency Init Value MC0 CHA [Auto]
Round Trip Latency Max Value MC0 CHA [Auto]
Round Trip Latency Offset Value Mode Sign MC0 CHA [-]
Round Trip Latency Offset Value MC0 CHA [Auto]
Round Trip Latency Init Value MC0 CHB [Auto]
Round Trip Latency Max Value MC0 CHB [Auto]
Round Trip Latency Offset Value Mode Sign MC0 CHB [-]
Round Trip Latency Offset Value MC0 CHB [Auto]
Round Trip Latency Init Value MC1 CHA [Auto]
Round Trip Latency Max Value MC1 CHA [Auto]
Round Trip Latency Offset Value Mode Sign MC1 CHA [-]
Round Trip Latency Offset Value MC1 CHA [Auto]
Round Trip Latency Init Value MC1 CHB [Auto]
Round Trip Latency Max Value MC1 CHB [Auto]
Round Trip Latency Offset Value Mode Sign MC1 CHB [-]
Round Trip Latency Offset Value MC1 CHB [Auto]
Round Trip Latency MC0 CHA R0 [Auto]
Round Trip Latency MC0 CHA R1 [Auto]
Round Trip Latency MC0 CHA R2 [0]
Round Trip Latency MC0 CHA R3 [0]
Round Trip Latency MC0 CHA R4 [0]
Round Trip Latency MC0 CHA R5 [0]
Round Trip Latency MC0 CHA R6 [0]
Round Trip Latency MC0 CHA R7 [0]
Round Trip Latency MC0 CHB R0 [Auto]
Round Trip Latency MC0 CHB R1 [Auto]
Round Trip Latency MC0 CHB R2 [0]
Round Trip Latency MC0 CHB R3 [0]
Round Trip Latency MC0 CHB R4 [0]
Round Trip Latency MC0 CHB R5 [0]
Round Trip Latency MC0 CHB R6 [0]
Round Trip Latency MC0 CHB R7 [0]
Round Trip Latency MC1 CHA R0 [Auto]
Round Trip Latency MC1 CHA R1 [Auto]
Round Trip Latency MC1 CHA R2 [0]
Round Trip Latency MC1 CHA R3 [0]
Round Trip Latency MC1 CHA R4 [0]
Round Trip Latency MC1 CHA R5 [0]
Round Trip Latency MC1 CHA R6 [0]
Round Trip Latency MC1 CHA R7 [0]
Round Trip Latency MC1 CHB R0 [Auto]
Round Trip Latency MC1 CHB R1 [Auto]
Round Trip Latency MC1 CHB R2 [0]
Round Trip Latency MC1 CHB R3 [0]
Round Trip Latency MC1 CHB R4 [0]
Round Trip Latency MC1 CHB R5 [0]
Round Trip Latency MC1 CHB R6 [0]
Round Trip Latency MC1 CHB R7 [0]
Early Command Training [Auto]
SenseAmp Offset Training [Auto]
Early ReadMPR Timing Centering 2D [Auto]
Read MPR Training [Auto]
Receive Enable Training [Auto]
Jedec Write Leveling [Auto]
Early Write Time Centering 2D [Auto]
Early Read Time Centering 2D [Auto]
Write Timing Centering 1D [Auto]
Write Voltage Centering 1D [Auto]
Read Timing Centering 1D [Auto]
Read Timing Centering with JR [Auto]
Dimm ODT Training* [Disabled]
Max RTT_WR [ODT Off]
DIMM RON Training* [Disabled]
Write Drive Strength/Equalization 2D* [Auto]
Write Slew Rate Training* [Auto]
Read ODT Training* [Disabled]
Comp Optimization Training [Auto]
Read Equalization Training* [Auto]
Read Amplifier Training* [Auto]
Write Timing Centering 2D [Auto]
Read Timing Centering 2D [Auto]
Command Voltage Centering [Auto]
Early Command Voltage Centering [Auto]
Write Voltage Centering 2D [Auto]
Read Voltage Centering 2D [Auto]
Late Command Training [Auto]
Round Trip Latency [Auto]
Turn Around Timing Training [Auto]
CMD CTL CLK Slew Rate [Auto]
CMD/CTL DS & E 2D [Auto]
Read Voltage Centering 1D [Auto]
TxDqTCO Comp Training* [Auto]
ClkTCO Comp Training* [Auto]
TxDqsTCO Comp Training* [Auto]
VccDLL Bypass Training [Auto]
CMD/CTL Drive Strength Up/Dn 2D [Auto]
DIMM CA ODT Training [Auto]
PanicVttDnLp Training* [Auto]
Read Vref Decap Training* [Auto]
Vddq Training [Disabled]
Duty Cycle Correction Training [Auto]
Periodic DCC [Auto]
Rank Margin Tool Per Bit [Auto]
DIMM DFE Training [Auto]
EARLY DIMM DFE Training [Auto]
Tx Dqs Dcc Training [Auto]
DRAM DCA Training [Auto]
Write Driver Strength Training [Auto]
Rank Margin Tool [Auto]
Memory Test [Auto]
DIMM SPD Alias Test [Auto]
Receive Enable Centering 1D [Auto]
Retrain Margin Check [Auto]
Write Drive Strength Up/Dn independently [Auto]
LPDDR DqDqs Re-Training [Auto]
Margin Check Limit [Disabled]
tRDRD_sg_Training [Auto]
tRDRD_sg_Runtime [16]
tRDRD_dg_Training [Auto]
tRDRD_dg_Runtime [8]
tRDWR_sg [18]
tRDWR_dg [18]
tWRWR_sg [16]
tWRWR_dg [8]
tWRRD_sg [Auto]
tWRRD_dg [Auto]
tRDRD_dr [0]
tRDRD_dd [Auto]
tRDWR_dr [0]
tRDWR_dd [Auto]
tWRWR_dr [0]
tWRWR_dd [Auto]
tWRRD_dr [0]
tWRRD_dd [Auto]
tRPRE [Auto]
tWPRE [Auto]
tWPOST [Auto]
tWRPRE [Auto]
tPRPDEN [Auto]
tRDPDEN [Auto]
tWRPDEN [Auto]
tCPDED [Auto]
tREFIX9 [Auto]
Ref Interval [Auto]
tXPDLL [Auto]
tXP [Auto]
tPPD [Auto]
tCCD_L_tDLLK [Auto]
tZQCAL [Auto]
tZQCS [Auto]
OREF_RI [Auto]
Refresh Watermarks [High]
Refresh Hp Wm [Auto]
Refresh Panic Wm [Auto]
Refresh Abr Release [Auto]
tXSDLL [Auto]
tZQOPER [Auto]
tMOD [Auto]
CounttREFIWhileRefEn [Auto]
HPRefOnMRS [Auto]
SRX Ref Debits [Auto]
RAISE BLK WAIT [Auto]
Ref Stagger En [Auto]
Ref Stagger Mode [Auto]
Disable Stolen Refresh [Auto]
En Ref Type Display [Auto]
Trefipulse Stagger Disable [Auto]
tRPab ext [Auto]
derating ext [Auto]
Allow 2cyc B2B LPDDR [Auto]
tCSH [Auto]
tCSL [Auto]
powerdown Enable [Auto]
idle length [Auto]
raise cke after exit latency [Auto]
powerdown latency [Auto]
powerdown length [Auto]
selfrefresh latency [Auto]
selfrefresh length [Auto]
ckevalid length [Auto]
ckevalid enable [Auto]
idle enable [Auto]
selfrefresh enable [Auto]
Address mirror [Auto]
no gear4 param divide [Auto]
x8 device [Auto]
no gear2 param divide [Auto]
ddr 1dpc split ranks on subch [Auto]
write0 enable [Auto]
MultiCycCmd [Auto]
WCKDiffLowInIdle [Auto]
PBR Disable [Auto]
PBR OOO Dis [Auto]
PBR Disable on hot [Auto]
PBR Exit on Idle Cnt [Auto]
tXSR [Auto]
Dec tCWL [Auto]
Add tCWL [Auto]
Add 1Qclk delay [Auto]
MRC Fast Boot [Enabled]
MCH Full Check [Auto]
Mem Over Clock Fail Count [2]
Training Profile [Auto]
RxDfe [Auto]
Mrc Training Loop Count [2]
DRAM CLK Period [Auto]
Dll_bwsel [Auto]
Controller 0, Channel 0 Control [Enabled]
Controller 0, Channel 1 Control [Enabled]
Controller 1, Channel 0 Control [Enabled]
Controller 1, Channel 1 Control [Enabled]
MC_Vref0 [Auto]
MC_Vref1 [Auto]
MC_Vref2 [Auto]
Fine Granularity Refresh mode [Auto]
SDRAM Density Per Die [Auto]
SDRAM Banks Per Bank Group [Auto]
SDRAM Bank Groups [Auto]
Dynamic Memory Boost [Disabled]
Realtime Memory Frequency [Disabled]
SA GV [Disabled]
Voltage Monitor [Die Sense]
VRM Initialization Check [Enabled]
CPU Input Voltage Load-line Calibration [Auto]
CPU Load-line Calibration [Level 5]
Synch ACDC Loadline with VRM Loadline [Disabled]
CPU Current Capability [Auto]
CPU Current Reporting [Auto]
Core Voltage Suspension [Auto]
CPU VRM Switching Frequency [Auto]
VRM Spread Spectrum [Auto]
CPU Power Duty Control [Auto]
CPU Power Phase Control [Auto]
CPU Power Thermal Control [125]
CPU Core/Cache Boot Voltage [Auto]
CPU Input Boot Voltage [Auto]
PLL Termination Boot Voltage [Auto]
CPU Standby Boot Voltage [Auto]
Memory Controller Boot Voltage [Auto]
CPU Core Auto Voltage Cap [Auto]
CPU Input Auto Voltage Cap [Auto]
Memory Controller Auto Voltage Cap [Auto]
Fast Throttle Threshold [Auto]
Package Temperature Threshold [Auto]
Regulate Frequency by above Threshold [Auto]
IVR Transmitter VDDQ ICCMAX [Auto]
Unlimited ICCMAX [Auto]
CPU Core/Cache Current Limit Max. [Auto]
Long Duration Package Power Limit [300]
Package Power Time Window [Auto]
Short Duration Package Power Limit [320]
Dual Tau Boost [Disabled]
IA AC Load Line [0.14]
IA DC Load Line [Auto]
IA CEP Enable [Disabled]
SA CEP Enable [Disabled]
IA SoC Iccmax Reactive Protector [Auto]
Inverse Temperature Dependency Throttle [Auto]
IA VR Voltage Limit [1500]
CPU SVID Support [Auto]
Cache Dynamic OC Switcher [Auto]
TVB Voltage Optimizations [Enabled]
Enhanced TVB [Enabled]
Overclocking TVB [Boost Until Target]
Max Boost Target in MHz [Auto]
Overclocking TVB Global Temperature Offset Sign [+]
Overclocking TVB Global Temperature Offset Value [Auto]
Offset Mode Sign 1 [-]
V/F Point 1 Offset [0.00100]
Offset Mode Sign 2 [-]
V/F Point 2 Offset [0.00100]
Offset Mode Sign 3 [-]
V/F Point 3 Offset [0.00100]
Offset Mode Sign 4 [-]
V/F Point 4 Offset [0.00100]
Offset Mode Sign 5 [-]
V/F Point 5 Offset [0.00100]
Offset Mode Sign 6 [-]
V/F Point 6 Offset [0.03000]
Offset Mode Sign 7 [-]
V/F Point 7 Offset [0.08000]
Offset Mode Sign 8 [-]
V/F Point 8 Offset [0.08000]
Offset Mode Sign 9 [-]
V/F Point 9 Offset [0.08200]
Offset Mode Sign 10 [-]
V/F Point 10 Offset [0.08500]
Offset Mode Sign 11 [-]
V/F Point 11 Offset [0.09000]
Initial BCLK Frequency [Auto]
Runtime BCLK OC [Auto]
BCLK Amplitude [Auto]
BCLK Slew Rate [Auto]
BCLK Spread Spectrum [Auto]
Initial PCIE Frequency [Auto]
PCIE/DMI Amplitude [Auto]
PCIE/DMI Slew Rate [Auto]
PCIE/DMI Spread Spectrum [Auto]
Cold Boot PCIE Frequency [Auto]
Realtime Memory Timing [Disabled]
SPD Write Disable [TRUE]
PVD Ratio Threshold [Auto]
SA PLL Frequency Override [Auto]
BCLK TSC HW Fixup [Enabled]
Core Ratio Extension Mode [Disabled]
FLL OC mode [Auto]
UnderVolt Protection [Disabled]
Switch Microcode [Current Microcode]
Xtreme Tweaking [Disabled]
Core PLL Voltage [Auto]
GT PLL Voltage [Auto]
Ring PLL Voltage [Auto]
System Agent PLL Voltage [Auto]
Memory Controller PLL Voltage [Auto]
Efficient-core PLL Voltage [Auto]
CPU 1.8V Small Rail [Auto]
PLL Termination Voltage [Auto]
CPU Standby Voltage [Auto]
PCH 1.05V Voltage [Auto]
PCH 0.82V Voltage [Auto]
CPU Input Voltage Reset Voltage [Auto]
Eventual CPU Input Voltage [Auto]
Eventual Memory Controller Voltage [Auto]
Package Temperature Threshold [Auto]
Regulate Frequency by above Threshold [Auto]
Cooler Efficiency Customize [Keep Training]
Cooler Re-evaluation Algorithm [Normal]
Optimism Scale [100]
Ring Down Bin [Auto]
Min. CPU Cache Ratio [Auto]
Max. CPU Cache Ratio [49]
BCLK Aware Adaptive Voltage [Auto]
Actual VRM Core Voltage [Auto]
Global Core SVID Voltage [Auto]
Cache SVID Voltage [Auto]
CPU L2 Voltage [Auto]
CPU System Agent Voltage [Manual Mode]
- CPU System Agent Voltage Override [1.12000]
CPU Input Voltage [Auto]
High DRAM Voltage Mode [Enabled]
DRAM VDD Voltage [1.45000]
DRAM VDDQ Voltage [1.43000]
IVR Transmitter VDDQ Voltage [1.24000]
Memory Controller Voltage [1.21250]
MC Voltage Calculation Voltage Base [Auto]
VDD Calculation Voltage Base [Auto]
PMIC Voltages [Auto]
PCI Express Native Power Management [Enabled]
Native ASPM [Disabled]
DMI Link ASPM Control [Disabled]
ASPM [Auto]
L1 Substates [Disabled]
DMI ASPM [Disabled]
DMI Gen3 ASPM [Disabled]
PEG - ASPM [Disabled]
PCI Express Clock Gating [Enabled]
Hardware Prefetcher [Enabled]
Adjacent Cache Line Prefetch [Enabled]
Intel (VMX) Virtualization Technology [Disabled]
Per P-Core Control [Disabled]
Per E-Core Control [Disabled]
Active Performance Cores [All]
Active Efficient Cores [All]
Hyper-Threading [Enabled]
Hyper-Threading of Core 0 [Enabled]
Hyper-Threading of Core 1 [Enabled]
Hyper-Threading of Core 2 [Enabled]
Hyper-Threading of Core 3 [Enabled]
Hyper-Threading of Core 4 [Enabled]
Hyper-Threading of Core 5 [Enabled]
Hyper-Threading of Core 6 [Enabled]
Hyper-Threading of Core 7 [Enabled]
Total Memory Encryption [Disabled]
Legacy Game Compatibility Mode [Disabled]
Boot performance mode [Auto]
Intel(R) SpeedStep(tm) [Enabled]
Intel(R) Speed Shift Technology [Disabled]
Turbo Mode [Enabled]
Acoustic Noise Mitigation [Disabled]
CPU C-states [Auto]
Thermal Monitor [Enabled]
Dual Tau Boost [Disabled]
VT-d [Disabled]
Memory Remap [Enabled]
Enable VMD controller [Enabled]
Map PCIE Storage under VMD [Disabled]
Map SATA Controller under VMD [Disabled]
M.2_1 Link Speed [Auto]
PCIEX16(G5)_1 Link Speed [Auto]
PCIEX16(G5)_2 Link Speed [Auto]
PCIEX1(G4) Link Speed [Auto]
PCIEX4(G4) Link Speed [Auto]
M.2_2 Link Speed [Auto]
DIMM.2_1 Link Speed [Auto]
DIMM.2_2 Link Speed [Auto]
SATA Controller(s) [Enabled]
Aggressive LPM Support [Disabled]
SMART Self Test [Enabled]
M.2_3 [Enabled]
M.2_3 Hot Plug [Disabled]
SATA6G_1 [Enabled]
SATA6G_1 Hot Plug [Disabled]
SATA6G_2 [Enabled]
SATA6G_2 Hot Plug [Disabled]
SATA6G_3 [Enabled]
SATA6G_3 Hot Plug [Disabled]
SATA6G_4 [Enabled]
SATA6G_4 Hot Plug [Disabled]
PTT [Enable]
Intel(R) Dynamic Tuning Technology [Disabled]
PCIE Tunneling over USB4 [Enabled]
Discrete Thunderbolt(TM) Support [Disabled]
Security Device Support [Enable]
SHA256 PCR Bank [Enabled]
Pending operation [None]
Platform Hierarchy [Enabled]
Storage Hierarchy [Enabled]
Endorsement Hierarchy [Enabled]
Physical Presence Spec Version [1.3]
Disable Block Sid [Disabled]
Password protection of Runtime Variables [Enable]
Above 4G Decoding [Enabled]
Resize BAR Support [Enabled]
SR-IOV Support [Disabled]
Legacy USB Support [Enabled]
XHCI Hand-off [Enabled]
SanDisk [Auto]
LAN_U32G2_1 [Enabled]
U32G1_E5 [Enabled]
U32G1_E6 [Enabled]
U32G1_E7 [Enabled]
U32G1_E8 [Enabled]
U32G2X2_C3 [Enabled]
U32G2_5 [Enabled]
U32G2_6 [Enabled]
U32G2_7 [Enabled]
U32G2_P8 [Enabled]
U32G2X2_C9 [Enabled]
U32G1_E1 [Enabled]
U32G1_E2 [Enabled]
U32G1_E3 [Enabled]
U32G1_E4 [Enabled]
Network Stack [Disabled]
Device [N/A]
Restore AC Power Loss [Power Off]
Max Power Saving [Disabled]
ErP Ready [Disabled]
Power On By PCI-E [Disabled]
Power On By RTC [Disabled]
USB Audio [Enabled]
Intel LAN [Enabled]
USB power delivery in Soft Off state (S5) [Disabled]
Connectivity mode (Wi-Fi & Bluetooth) [Disabled]
When system is in working state [All On]
Q-Code LED Function [POST Code Only]
When system is in sleep, hibernate or soft off states [All On]
M.2_2 Configuration [Auto]
ASMedia USB 3.2 Controller_U32G1_E12 [Enabled]
ASMedia USB 3.2 Controller_U32G1_E34 [Enabled]
GNA Device [Disabled]
ASMedia Storage Controller [Enabled]
Windows Hot-plug Notification [Disabled]
ASPM Support [Disabled]
CPU Temperature [Monitor]
CPU Package Temperature [Monitor]
MotherBoard Temperature [Monitor]
VRM Temperature [Monitor]
Chipset Temperature [Monitor]
T_Sensor Temperature [Monitor]
DIMM.2 Sensor 1 Temperature [Monitor]
DIMM.2 Sensor 2 Temperature [Monitor]
Water In T Sensor Temperature [Monitor]
Water Out T Sensor Temperature [Monitor]
DIMM A1 Temperature [Monitor]
DIMM B1 Temperature [Monitor]
CPU Fan Speed [Monitor]
CPU Optional Fan Speed [Monitor]
Chassis Fan 1 Speed [Monitor]
Chassis Fan 2 Speed [Monitor]
Chassis Fan 3 Speed [Monitor]
Water Pump+ Speed [Monitor]
AIO Pump Speed [Monitor]
Flow Rate [Monitor]
CPU Core Voltage [Monitor]
12V Voltage [Monitor]
5V Voltage [Monitor]
3.3V Voltage [Monitor]
Memory Controller Voltage [Monitor]
CPU Fan Q-Fan Control [DC Mode]
CPU Fan Profile [Standard]
CPU Fan Q-Fan Source [CPU]
CPU Fan Step Up [Level 0]
CPU Fan Step Down [Level 4]
CPU Fan Speed Low Limit [200 RPM]
Chassis Fan 1 Q-Fan Control [Auto Detect]
Chassis Fan 1 Profile [Standard]
Chassis Fan 1 Q-Fan Source [CPU]
Chassis Fan 1 Step Up [Level 0]
Chassis Fan 1 Step Down [Level 0]
Chassis Fan 1 Speed Low Limit [200 RPM]
Chassis Fan 2 Q-Fan Control [PWM Mode]
Chassis Fan 2 Profile [Standard]
Chassis Fan 2 Q-Fan Source [Chipset]
Chassis Fan 2 Step Up [Level 0]
Chassis Fan 2 Step Down [Level 4]
Chassis Fan 2 Speed Low Limit [200 RPM]
Chassis Fan 3 Q-Fan Control [DC Mode]
Chassis Fan 3 Profile [Silent]
Chassis Fan 3 Q-Fan Source [CPU]
Chassis Fan 3 Step Up [Level 0]
Chassis Fan 3 Step Down [Level 0]
Chassis Fan 3 Speed Low Limit [200 RPM]
Water Pump+ Q-Fan Control [PWM Mode]
Water Pump+ Profile [Manual]
Water Pump+ Q-Fan Source [CPU]
Water Pump+ Step Up [Level 0]
Water Pump+ Step Down [Level 4]
Water Pump+ Speed Low Limit [Ignore]
Water Pump+ Point4 Temperature [70]
Water Pump+ Point4 Duty Cycle (%) [100]
Water Pump+ Point3 Temperature [50]
Water Pump+ Point3 Duty Cycle (%) [85]
Water Pump+ Point2 Temperature [40]
Water Pump+ Point2 Duty Cycle (%) [80]
Water Pump+ Point1 Temperature [25]
Water Pump+ Point1 Duty Cycle (%) [60]
AIO Pump Q-Fan Control [Auto Detect]
AIO Pump Profile [Full Speed]
CPU Temperature LED Switch [Enabled]
Launch CSM [Disabled]
OS Type [Other OS]
Secure Boot Mode [Custom]
Fast Boot [Enabled]
Next Boot after AC Power Loss [Fast Boot]
Boot Logo Display [Auto]
POST Delay Time [3 sec]
Bootup NumLock State [On]
Wait For 'F1' If Error [Enabled]
Option ROM Messages [Force BIOS]
Interrupt 19 Capture [Disabled]
AMI Native NVMe Driver Support [Enabled]
Setup Mode [Advanced Mode]
Boot Sector (MBR/GPT) Recovery Policy [Local User Control]
Next Boot Recovery Action [Skip]
BIOS Image Rollback Support [Enabled]
Publish HII Resources [Disabled]
Flexkey [Safe Boot]
Setup Animator [Disabled]
Load from Profile [7]
Profile Name [Test_New]
Save to Profile [1]
DIMM Slot Number [DIMM_A1]
Download & Install ARMOURY CRATE app [Disabled]
Download & Install MyASUS service & app [Disabled]
Fast Boot wegen viel Restart, an.
 

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