[Sammelthread] OC Prozessoren Intel Sockel 1151 (Coffee Lake) Laberthread
- Ersteller ralle_h
- Erstellt am
TurricanM3
Legende
Ich verstehe ehrlich gesagt auch nicht warum bei mir 13 tFAW laufen. Nach einer Stunde Memtest und 4000% hatte ich keine Lust mehr. Mir ist aber wirklich auch sonst noch nichts abgeschmiert. Vielleicht passierts ja noch, aber ob das dann deshalb passiert ist dann eine gute Frage. ^^
BangerMV
Enthusiast
Einer meiner Aufrüstgründe waren die starken FPS-Drops bei meinen bestimmten Einstellungen in GTA5 auf bestimmten Bereichen der Map. 4790K (4,5GHz) mit 1600-RAM droppte es dann von rund 80 auf 45FPS, teilweise auf 41. Dafür flog ich im Spiel mit dem Heli über den Bereich. (Die Drosselung des CPU-Fresser erweiterte Sichtweite verhinderte Drops nicht gänzlich, lediglich wurden sie seltener.) Mit der Aufrüstung auf 8700K (Stock-Takt) und Asrock Z370 K6 habe ich diese FPS-Drops abmildern können. Da gingen die FPS mit dem Heliflug nur bis 61 runter. Guter Wert. Dann habe ich den Test mit einem schnellen Flugzeug wiederholt. Diesmal runter bis 48FPS wegen der höheren Fluggeschwindigkeit. Mit Multicore Enhancement (alle Kerne auf 4,7GHz) konnte ich wiederum mit dem Flugzeugtest 55FPS erreichen und mit dem langsameren Heli gingen wie erwartet wieder über 60FPS. Fazit: Die CPU muss übertaktet betrieben werden.
Was ich nun möchte: Das Spiel soll konstant mit 60FPS laufen, auch wenn ich mit einem schnellen Flugzeug in Schlechte-Performance-Stellen bin, zumindest sollten aber 55FPS drin sein. Die sind dann mit V-Sync ggf. nicht zu merken, 48 merke ich aber auch mit V-Sync. Und Drops, die man merkt, nerven. Daher muss die CPU übertaktet werden. Die CPU soll mit 4,7GHZ mit 1,25V betreiben, werden, was dann auch mit Prime getestet werden soll zwecks Soannungsoptimierung. Bei sinkender Last und Taktraten soll die Spannung nach unten gehen und da wäre es schön, wenn mir jemand helfen könnte, der sich ggf. mit Asrock auskennt, damit ich vernünftig einstelle. Die Nebenspannungen und die Nebentaktrate (Cache) sollen alle auf Stock bleiben.
Der Grund, warum Multicore Enhancement keine Dauerlösung ist. Die Spannung ist da so meistens bei 1,32 bis 1,36V und das ist mir zu hoch. Da ging die CPU auch auf max. 82°C, währen die auf Stock max. 72 hatte.
Festmodus scheint auch keine Lösung zu sein? Aber aus diesem werde ich nicht so ganz schlau. Mit eingestellten 1,25V sind laut GPU-Z auch 1,248 und 1,264V im Idle bei wenig Takt. Unter Last eher keine 1,264V wegen V-Drop mit LLC5. Aber in HW-Info ist der Wert bei V-Core immer bei 0,624V, Leerlauf oder Last ist egal. Der Wert bei VID bei den Kernen schwankt aber je nach Last und Takt von 0,640-1,470V. Da scheint die Spannung anhand des Namens und CPU-Z tatsächlich fest zu sein
, während HW-Info teilweilse Müll ausliest oder errechnet? Die feste Spannung würde gegen eine Nutzung sprechen.
Den Offset-Modus kann ich offenbar auch nicht in Betracht ziehen. Bei einem Negativwert kann ich nur -100mV eingeben und damit friert der Rechner in Windows-Ladebildschirm ein. Anhand der Spannung von Multicore Enhancement müsste eher ich -50mV bis -70mV eingeben, abhängig von V-Drop, sodass unter Last meine Wunschspannung zum Testen ist. Aber diese Werte lassen sich nicht eingeben.
Also brauche ich wieder den Override-Modus, den ich aber im Bios nicht finde. Und da ist nun das Problem, was ich da am besten mache. Bei meinem alten Asrock Z87 Extreme 4 hatte ich meine CPU auch mit dem Override-Modus übertaktet. Da wurde zwar nur eine feste Spannung in CPU-Z angezeigt, aber die ging bei weniger Last und Takt jedoch trotzdem runter.
Was ich nun möchte: Das Spiel soll konstant mit 60FPS laufen, auch wenn ich mit einem schnellen Flugzeug in Schlechte-Performance-Stellen bin, zumindest sollten aber 55FPS drin sein. Die sind dann mit V-Sync ggf. nicht zu merken, 48 merke ich aber auch mit V-Sync. Und Drops, die man merkt, nerven. Daher muss die CPU übertaktet werden. Die CPU soll mit 4,7GHZ mit 1,25V betreiben, werden, was dann auch mit Prime getestet werden soll zwecks Soannungsoptimierung. Bei sinkender Last und Taktraten soll die Spannung nach unten gehen und da wäre es schön, wenn mir jemand helfen könnte, der sich ggf. mit Asrock auskennt, damit ich vernünftig einstelle. Die Nebenspannungen und die Nebentaktrate (Cache) sollen alle auf Stock bleiben.
Der Grund, warum Multicore Enhancement keine Dauerlösung ist. Die Spannung ist da so meistens bei 1,32 bis 1,36V und das ist mir zu hoch. Da ging die CPU auch auf max. 82°C, währen die auf Stock max. 72 hatte.
Festmodus scheint auch keine Lösung zu sein? Aber aus diesem werde ich nicht so ganz schlau. Mit eingestellten 1,25V sind laut GPU-Z auch 1,248 und 1,264V im Idle bei wenig Takt. Unter Last eher keine 1,264V wegen V-Drop mit LLC5. Aber in HW-Info ist der Wert bei V-Core immer bei 0,624V, Leerlauf oder Last ist egal. Der Wert bei VID bei den Kernen schwankt aber je nach Last und Takt von 0,640-1,470V. Da scheint die Spannung anhand des Namens und CPU-Z tatsächlich fest zu sein
, während HW-Info teilweilse Müll ausliest oder errechnet? Die feste Spannung würde gegen eine Nutzung sprechen.Den Offset-Modus kann ich offenbar auch nicht in Betracht ziehen. Bei einem Negativwert kann ich nur -100mV eingeben und damit friert der Rechner in Windows-Ladebildschirm ein. Anhand der Spannung von Multicore Enhancement müsste eher ich -50mV bis -70mV eingeben, abhängig von V-Drop, sodass unter Last meine Wunschspannung zum Testen ist. Aber diese Werte lassen sich nicht eingeben.
Also brauche ich wieder den Override-Modus, den ich aber im Bios nicht finde. Und da ist nun das Problem, was ich da am besten mache. Bei meinem alten Asrock Z87 Extreme 4 hatte ich meine CPU auch mit dem Override-Modus übertaktet. Da wurde zwar nur eine feste Spannung in CPU-Z angezeigt, aber die ging bei weniger Last und Takt jedoch trotzdem runter.
Ich lese immer wieder vom Köpfen der CPUs. Kann jemand mal ein Bild verlinken, wie das geht bzw. wie die CPU danach aussieht? Ich habe früher mal CPUs geschliffen... Garantie ist ja damit auch obsolet, nehme ich mal stark an? Und zweite Frage: wie viel bringt es tatsächlich oder im Schnitt, kann man dazu eine Aussage machen? Sind es einfach etwas niedrige Temperaturen, daher mehr Spannung und Taktung möglich?
panopticum
Enthusiast
gibt es etliche youtube videos zu, da siehst du es am besten.
Garantie ist natürlich hin.
Garantie ist natürlich hin.
@TurricanM3
habe jetzt mal 1T gegen 2T verglichen.
Der Unterschied ist wirklich marginal und kann schon fast als Messtoleranz durchgehen.
Ich denke nicht, dass es sich lohnt um biegen und brechen 1T zu aktivieren. Wenn es läuft, ok....
Wenn nicht, auch nicht schlimm.
habe jetzt mal 1T gegen 2T verglichen.
Der Unterschied ist wirklich marginal und kann schon fast als Messtoleranz durchgehen.
Ich denke nicht, dass es sich lohnt um biegen und brechen 1T zu aktivieren. Wenn es läuft, ok....
Wenn nicht, auch nicht schlimm.
Und wie viel bringt es tatsächlich?
//Edit: im ersten YouTube Video sind von 15 bis 20 Grad die Rede. Hui... das wäre viel.
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gibt viele Videos dazu. Bilder auch hier im Forum. Ist keine grosse Sache eigentlich. Mit dem Tool sowieso nicht.
Temps werden 10-15 grad tiefer. Dadurch ermöglicht es 1-2 Stufen tiefer zu gehen mit der Vcore. (cpuz).
Gesendet von meinem SM-G935F mit Tapatalk
the_patchelor
Legende
einfach mal im Forum nachschauen:
[Sammelthread] Intel Ivy Bridge/Haswell/Skylake geköpft - Erfahrungen ohne HS/mit gewechseltem TIM
BF2-Gamer
Legende
- Mitglied seit
- 22.01.2010
- Beiträge
- 11.499
Hat mal jemand den Patch deinstalliert?
panopticum
Enthusiast
Ich habe nach dem Patch nur Abweichungen im Messtoleranzbereich.
UWQHD:
Assassine Creed Origins
Wildlands
Division
Firestrike und Konsorten....
Welche Spiele hast Du im Video gesehen?
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BF2-Gamer
Legende
- Mitglied seit
- 22.01.2010
- Beiträge
- 11.499
GTA: Comparação de desempenho do patch kb4056892 - YouTube (Spiele ich nicht)
Die größten Unterschiede werden wohl bei FHD (und 720P) zu finden sein. 4K-Player werden wohl kaum einen Unterschied feststellen. Ich hoffe, ich bekomme bald meinen G-Sync WQHD Monitor...
Die größten Unterschiede werden wohl bei FHD (und 720P) zu finden sein. 4K-Player werden wohl kaum einen Unterschied feststellen. Ich hoffe, ich bekomme bald meinen G-Sync WQHD Monitor...
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MikelMolto
Neuling
- Mitglied seit
- 17.11.2009
- Beiträge
- 832
Bei mir sind die GFlops in Linx definitiv weniger mit dem Patch und mit dem letzten Bios Update (ca. 1,8%) und mehrmals getestet.
Habe jetzt die selben GFlops die ich vorher mit 4,7Ghz hatte mit 4,8Ghz.
Was mich gerade richtig weg gehauen hat ist die Adaptiv VCore. Da kann man weniger an VCore einstellen was man will und der ignoriert das einfach. Der orientiert sich voll an der VID, die mit dem Takt ja auch ansteigt.
Also fleißig sein und mit Offset ausloten, welche VCore ich wirklich für 4,8Ghz brauche. Nach 2 Stunden rumtesten komme ich in Offset genau auf die selbe VCore unter Last, die er im adaptiv gegeben hat. Dumm ist der also nicht.
Habe jetzt die selben GFlops die ich vorher mit 4,7Ghz hatte mit 4,8Ghz.
Was mich gerade richtig weg gehauen hat ist die Adaptiv VCore. Da kann man weniger an VCore einstellen was man will und der ignoriert das einfach. Der orientiert sich voll an der VID, die mit dem Takt ja auch ansteigt.
Also fleißig sein und mit Offset ausloten, welche VCore ich wirklich für 4,8Ghz brauche. Nach 2 Stunden rumtesten komme ich in Offset genau auf die selbe VCore unter Last, die er im adaptiv gegeben hat. Dumm ist der also nicht.
aerotracks
Legende
Das Problem ist, das die VID nicht auf z.B. 1,344V begrenzt wird unter AVX Last.
Sondern "unkontrolliert" auf 1,37V steigt, je nach VID laune.
Ziel :
Adaptive Mode 1,345V
(minus Offset und minus LLC)
Non AVX z.B. 1,30V
AVX z.B. 1,28V
Linx z.B. 1,264V
Moin!
Erstmal das System:
I7 8700K
Z370 Gigabyte Aorus Ultra Gaming
16 GB Gskill 3200 MHZ
Lukü (Sycthe Ninja) Schon etwas älter, hat aber meinem vorherigen geköpften I7 7700K@4,7 1,25v immer gute Temps beschert.
Ich habe vorgestern meinen neuen Prozessor erhalten, und ihn mit einem Freund zusammen geköpft und wieder sauber verklebt.
Cpu läuft auch, aber ein paar Ungereimtheiten sind doch irgendwie da. Bin gerade dabei das System auf Stabilität zu testen usw.
Das ganze mit Prime95 v26.6 ohne AVX und selbst da kommt der bei 4,7 und einer sehr moderaten Spannung von 1,25V nahe der 80 Grad.
Mit AVX gerne bis an die 85 Grad bei max. 1,30 V. LLC ist auf High. HWINFO zeigt übrigens eine viel höhere Spannung an, als CPU-Z wie auf dem Bild zu sehen ist.
mfg moreno111
Erstmal das System:
I7 8700K
Z370 Gigabyte Aorus Ultra Gaming
16 GB Gskill 3200 MHZ
Lukü (Sycthe Ninja) Schon etwas älter, hat aber meinem vorherigen geköpften I7 7700K@4,7 1,25v immer gute Temps beschert.
Ich habe vorgestern meinen neuen Prozessor erhalten, und ihn mit einem Freund zusammen geköpft und wieder sauber verklebt.
Cpu läuft auch, aber ein paar Ungereimtheiten sind doch irgendwie da. Bin gerade dabei das System auf Stabilität zu testen usw.
Das ganze mit Prime95 v26.6 ohne AVX und selbst da kommt der bei 4,7 und einer sehr moderaten Spannung von 1,25V nahe der 80 Grad.
Mit AVX gerne bis an die 85 Grad bei max. 1,30 V. LLC ist auf High. HWINFO zeigt übrigens eine viel höhere Spannung an, als CPU-Z wie auf dem Bild zu sehen ist.
mfg moreno111
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Das, was in HWInfo mit VID gekennzeichnet ist, ist was anderes als die tatsächliche vCore (CPU-Z).
Wenn du bessere Temps möchtest, musst du die CPU köpfen bzw. köpfen lassen. (Siehe Signatur)
Prime 26.6 ist outdated. Nimm mal 29.4. Für Gigabyte Exoten wirst du hier nicht viel Hilfe bekommen können.
hier aber dafür:
GIGABYTE Z370 Guide to Overclocking Coffee Lake CPUs to 5GHz+ - Overclocking.Guide
Wenn du bessere Temps möchtest, musst du die CPU köpfen bzw. köpfen lassen. (Siehe Signatur)
Prime 26.6 ist outdated. Nimm mal 29.4. Für Gigabyte Exoten wirst du hier nicht viel Hilfe bekommen können.
hier aber dafür:
GIGABYTE Z370 Guide to Overclocking Coffee Lake CPUs to 5GHz+ - Overclocking.Guide
aerotracks
Legende
Hab ich ja gemacht, ohne legt die VID ja an was sie will.
Der Wert passt halt noch nicht für Kaffeesee und AVX-Last.
bzw. greift nur bei Non AVX-Last.
Ai Overclock Tuner [XMP]
XMP [XMP DDR4-4000 18-19-19-39-1.35V]
BCLK Frequency [100.0000]
ASUS MultiCore Enhancement [Disabled]
SVID Behavior [Best-Case Scenario]
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DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL3 [Auto]
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DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL3 [Auto]
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DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL1 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL2 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL3 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL4 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL5 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL6 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL7 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL0 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL1 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL2 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL3 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL4 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL5 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL6 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL7 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL0 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL1 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL2 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL3 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL4 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL5 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL6 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL7 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL0 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL1 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL2 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL3 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL4 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL5 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL6 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL7 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL0 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL1 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL2 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL3 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL4 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL5 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL6 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL7 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL0 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL1 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL2 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL3 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL4 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL5 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL6 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL7 [Auto]
Realtime Memory Timing [Disabled]
FCLK Frequency for Early Power On [Auto]
Initial BCLK Frequency [Auto]
BCLK Amplitude [Auto]
BCLK Slew Rate [Auto]
BCLK Spread Spectrum [Auto]
BCLK Frequency Slew Rate [Auto]
DRAM VTT Voltage [Auto]
VPPDDR Voltage [Auto]
DMI Voltage [Auto]
Core PLL Voltage [Auto]
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GT PLL Voltage [Auto]
Ring PLL Voltage [Auto]
System Agent PLL Voltage [Auto]
Memory Controller PLL Voltage [Auto]
PLL Bandwidth [Auto]
Eventual DRAM Voltage [Auto]
Eventual CPU Standby Voltage [Auto]
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Maximus Tweak [Mode 1]
DRAM CAS# Latency [18]
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DRAM RAS# ACT Time [39]
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Channel A DIMM Control [Enabled]
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DLLBwEn [Auto]
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XTU Setting [Auto]
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Disable Fast PKG C State Ramp for IA Domain [FALSE]
Slow Slew Rate for IA Domain [Fast/2]
Disable Fast PKG C State Ramp for GT Domain [FALSE]
Slow Slew Rate for GT Domain [Fast/2]
Disable Fast PKG C State Ramp for SA Domain [FALSE]
Slow Slew Rate for SA Domain [Fast/2]
Configurable TDP Boot Mode [Nominal]
Configurable TDP Lock [Disabled]
CTDP BIOS control [Disabled]
Power Limit 1 [0]
Power Limit 2 [0]
Power Limit 1 Time Window [0]
ConfigTDP Turbo Activation Ratio [0]
Overclocking Lock [Disabled]
PCI Express Native Power Management [Disabled]
PCH DMI ASPM [Disabled]
ASPM [Disabled]
DMI Link ASPM Control [Disabled]
PEG - ASPM [Disabled]
PTID Support [Enabled]
PECI Access Method [Direct I/O]
PCI Express Native Power Management [Disabled]
BDAT ACPI Table Support [Disabled]
Wake system from S5 [Disabled]
ACPI Debug [Disabled]
Low Power S0 Idle Capability [Disabled]
Lpit Recidency Counter [SLP S0]
PCI Delay Optimization [Disabled]
ZpODD Support [Disabled]
Type C Support [Enabled]
PEP CPU [Enabled]
PEP Graphics [Enabled]
PEP ISP [Disabled]
PEP SATA Controller [Enabled]
PEP RAID VOL0 [Disabled]
PEP SATA PORT0 [Disabled]
PEP SATA PORT1 [Disabled]
PEP SATA PORT2 [Disabled]
PEP SATA PORT3 [Disabled]
PEP SATA PORT4 [Disabled]
PEP SATA PORT5 [Disabled]
PEP SATA NVM1 [Disabled]
PEP SATA NVM2 [Disabled]
PEP SATA NVM3 [Disabled]
PEP UART [Enabled]
PEP I2C0 [Enabled]
PEP I2C1 [Enabled]
PEP I2C2 [Enabled]
PEP I2C3 [Enabled]
PEP I2C4 [Enabled]
PEP I2C5 [Enabled]
PEP SPI [Enabled]
PEP XHCI [Enabled]
PEP Audio [Enabled]
PEP EMMC [Enabled]
PEP SDXC [Enabled]
VT-d [Disabled]
Primary Display [Auto]
iGPU Multi-Monitor [Disabled]
DMI Max Link Speed [Auto]
PCIEX16/X8_1 Link Speed [Auto]
PCIEX8/X4_3 Link Speed [Auto]
PCIEX4_2 Link Speed [Auto]
PCIe Spread Spectrum Clocking [Auto]
IOAPIC 24-119 Entries [Enabled]
PCIe Speed [Auto]
SATA Controller(s) [Enabled]
SATA Mode Selection [AHCI]
S.M.A.R.T. Status Check [Enabled]
Aggressive LPM Support [Disabled]
SATA6G_1(Gray) [Enabled]
Hot Plug [Disabled]
SATA6G_2(Gray) [Enabled]
Hot Plug [Disabled]
SATA6G_3(Gray) [Enabled]
Hot Plug [Disabled]
SATA6G_4(Gray) [Enabled]
Hot Plug [Disabled]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 0 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 1 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 2 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 3 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 4 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 5 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
Port 6 [Enabled]
Hot Plug [Disabled]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 6 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
Port 7 [Enabled]
Hot Plug [Disabled]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 7 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
PCI Express Root Port 1 [Enabled]
Topology [Unknown]
ASPM [Disabled]
L1 Substates [Disabled]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE1 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE1 LTR Lock [Disabled]
PCIE1 CLKREQ Mapping Override [Default]
PCI Express Root Port 2 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE2 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE2 LTR Lock [Disabled]
PCIE2 CLKREQ Mapping Override [Default]
PCI Express Root Port 3 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE3 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE3 LTR Lock [Disabled]
PCIE3 CLKREQ Mapping Override [Default]
PCI Express Root Port 4 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE4 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE4 LTR Lock [Disabled]
PCIE4 CLKREQ Mapping Override [Default]
PCI Express Root Port 5 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE5 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE5 LTR Lock [Disabled]
PCIE5 CLKREQ Mapping Override [Default]
PCI Express Root Port 6 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE6 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE6 LTR Lock [Disabled]
PCIE6 CLKREQ Mapping Override [Default]
PCI Express Root Port 7 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [7]
Reserved Memory [17]
Reserved I/O [16]
PCH PCIE7 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE7 LTR Lock [Disabled]
PCIE7 CLKREQ Mapping Override [Default]
PCI Express Root Port 8 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [7]
Reserved Memory [17]
Reserved I/O [8]
PCH PCIE8 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE8 LTR Lock [Disabled]
PCIE8 CLKREQ Mapping Override [Default]
PCI Express Root Port 9 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE9 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE9 LTR Lock [Disabled]
PCIE9 CLKREQ Mapping Override [Default]
PCI Express Root Port 10 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE10 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE10 LTR Lock [Disabled]
PCIE10 CLKREQ Mapping Override [Default]
PCI Express Root Port 11 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE11 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE11 LTR Lock [Disabled]
PCIE11 CLKREQ Mapping Override [Default]
PCI Express Root Port 12 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE12 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE12 LTR Lock [Disabled]
PCIE12 CLKREQ Mapping Override [Default]
PCI Express Root Port 13 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE13 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE13 LTR Lock [Disabled]
PCIE13 CLKREQ Mapping Override [Default]
PCI Express Root Port 14 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE14 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE14 LTR Lock [Disabled]
PCIE14 CLKREQ Mapping Override [Default]
PCI Express Root Port 15 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE15 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE15 LTR Lock [Disabled]
PCIE15 CLKREQ Mapping Override [Default]
PCI Express Root Port 16 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE16 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE16 LTR Lock [Disabled]
PCIE16 CLKREQ Mapping Override [Default]
PCI Express Root Port 17 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE17 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE17 LTR Lock [Disabled]
PCIE17 CLKREQ Mapping Override [Default]
PCI Express Root Port 18 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE18 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE18 LTR Lock [Disabled]
PCIE18 CLKREQ Mapping Override [Default]
PCI Express Root Port 19 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE19 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE19 LTR Lock [Disabled]
PCIE19 CLKREQ Mapping Override [Default]
PCI Express Root Port 20 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE20 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE20 LTR Lock [Disabled]
PCIE20 CLKREQ Mapping Override [Default]
PCI Express Root Port 21 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE21 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE21 LTR Lock [Disabled]
PCIE20 CLKREQ Mapping Override [Default]
PCI Express Root Port 22 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE22 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE22 LTR Lock [Disabled]
PCIE20 CLKREQ Mapping Override [Default]
PCI Express Root Port 23 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE23 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE23 LTR Lock [Disabled]
PCIE20 CLKREQ Mapping Override [Default]
PCI Express Root Port 24 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE24 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE24 LTR Lock [Disabled]
PCIE20 CLKREQ Mapping Override [Default]
Audio DSP [Disabled]
HDA-Link Codec Select [Platform Onboard]
iDisplay Audio Disconnect [Disabled]
PME Enable [Disabled]
SerialIO timing parameters [Disabled]
TPM Device Selection [dTPM]
PTP aware OS [PTP Aware]
Me FW Image Re-Flash [Disabled]
Local FW Update [Enabled]
HECI Timeouts [Enabled]
Force ME DID Init Status [Disabled]
CPU Replaced Polling Disable [Disabled]
ME DID Message [Enabled]
HECI Retry Disable [Disabled]
HECI Message check Disable [Disabled]
MBP HOB Skip [Disabled]
HECI2 Interface Communication [Disabled]
KT Device [Enabled]
IDER Device [Enabled]
End Of Post Message [Send in DXE]
D0I3 Setting for HECI Disable [Disabled]
Select Camera [Ivcam]
Delay needed for Ivcam power on [0]
Delay needed for Ivcam power off [0]
Rotation [0]
DFU support [Disabled]
Wake support [Disabled]
Core PLL Voltage Offset [0]
GT PLL Voltage Offset [0]
Ring PLL Voltage Offset [0]
System Agent PLL Voltage Offset [0]
Memory Controller PLL Voltage Offset [0]
ASF support [Enabled]
USB Provisioning of AMT [Disabled]
Activate Remote Assistance Process [Disabled]
CIRA Timeout [0]
PET Progress [Enabled]
WatchDog [Disabled]
OS Timer [0]
BIOS Timer [0]
Secure Erase mode [Simulated]
Force Secure Erase [Disabled]
MEBx hotkey Pressed [Disabled]
MEBx Selection Screen [Disabled]
Hide Unconfigure ME Confirmation Prompt [Disabled]
MEBx OEM Debug Menu Enable [Disabled]
Unconfigure ME [Disabled]
Non-UI Mode Resolution [Auto]
UI Mode Resolution [Auto]
Graphics Mode Resolution [Auto]
Security Device Support [Enable]
Security Device Support [Enable]
Pending operation [None]
Platform Hierarchy [Enabled]
Storage Hierarchy [Enabled]
Endorsement Hierarchy [Enabled]
TPM2.0 UEFI Spec Version [TCG_2]
Physical Presence Spec Version [1.3]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Onboard LED [Enabled]
Q-Code LED Function [POST Code Only]
ErP Ready [Disabled]
Restore AC Power Loss [Power Off]
Power On By PCI-E/PCI [Disabled]
Power On By RTC [Disabled]
HD Audio Controller [Enabled]
M.2_2(DIMM.2) Configuration: [Auto][SATA mode][PCIE mode] [Auto]
Asmedia Back USB 3.1 Controller [Enabled]
USB Type C Power Switch [Auto]
When system is in working state [Off]
When system is in sleep, hibernate or soft off states [Off]
5G LAN Card [Enabled]
5G LAN PXE Option ROM [Disabled]
Intel LAN Controller [Enabled]
Intel LAN PXE Option ROM [Disabled]
Detect Non-Compliance Device [Disabled]
Primary PEG [Auto]
Primary PCIE [Auto]
Network Stack [Disabled]
Legacy USB Support [Enabled]
USB Keyboard and Mouse Simulator [Disabled]
U31G2_EC1 [Enabled]
U31G2_EA2 [Enabled]
U31G1_1 [Enabled]
U31G1_2 [Enabled]
U31G1_3 [Enabled]
U31G1_4 [Enabled]
U31G1_5 [Enabled]
U31G1_6 [Enabled]
U31G1_7 [Enabled]
U31G1_8 [Enabled]
USB_9 [Enabled]
USB_10 [Enabled]
USB_11 [Enabled]
USB_12 [Enabled]
USB_13 [Enabled]
USB_14 [Enabled]
CPU Temperature [Monitor]
MotherBoard Temperature [Monitor]
VRM Temperature [Monitor]
PCH Temperature [Monitor]
T_Sensor1 Temperature [Monitor]
T_Sensor2 Temperature [Monitor]
DIMM.2 Sensor 1 [Monitor]
DIMM.2 Sensor 2 [Monitor]
Water In T Sensor [Monitor]
Water Out T Sensor [Monitor]
CPU Fan Speed [Monitor]
Chassis Fan 1 Speed [Monitor]
Chassis Fan 2 Speed [Monitor]
Chassis Fan 3 Speed [Monitor]
AIO PUMP Speed [Monitor]
CPU Optional Fan Speed [Monitor]
W_PUMP+ Speed [Monitor]
Flow Rate [Monitor]
CPU Core Voltage [Monitor]
3.3V Voltage [Monitor]
5V Voltage [Monitor]
12V Voltage [Monitor]
CPU Q-Fan Control [Disabled]
AIO_PUMP/W_PUMP+ Control [Disabled]
Chassis Fan 1 Q-Fan Control [Disabled]
Chassis Fan 2 Q-Fan Control [Disabled]
Chassis Fan 3 Q-Fan Control [Disabled]
Fast Boot [Disabled]
Above 4G Decoding [Disabled]
Boot Logo Display [Auto]
POST Delay Time [3 sec]
Boot up NumLock State [Enabled]
Wait For 'F1' If Error [Enabled]
Option ROM Messages [Enabled]
Interrupt 19 Capture [Enabled]
Setup Mode [Advanced Mode]
Launch CSM [Enabled]
Boot Device Control [UEFI and Legacy OPROM]
Boot from Network Devices [Legacy only]
Boot from Storage Devices [Legacy only]
Boot from PCI-E/PCI Expansion Devices [Legacy only]
OS Type [Other OS]
Setup Animator [Disabled]
Load from Profile [1]
Profile Name [XMP]
Save to Profile [1]
CPU Core Voltage [Auto]
VCCSA Voltage [Auto]
BCLK Frequency [Auto]
CPU Ratio [Auto]
Cache Ratio [Auto]
Bus Interface [PCIEX16/X8_1]
XMP [XMP DDR4-4000 18-19-19-39-1.35V]
BCLK Frequency [100.0000]
ASUS MultiCore Enhancement [Disabled]
SVID Behavior [Best-Case Scenario]
AVX Instruction Core Ratio Negative Offset [0]
CPU Core Ratio [Auto]
BCLK Frequency : DRAM Frequency Ratio [Auto]
DRAM Odd Ratio Mode [Enabled]
DRAM Frequency [DDR4-4000MHz]
Xtreme Tweaking [Disabled]
TPU [Keep Current Settings]
CPU SVID Support [Enabled]
CPU Core/Cache Current Limit Max. [255.50]
Ring Down Bin [Auto]
Min. CPU Cache Ratio [8]
Max CPU Cache Ratio [45]
BCLK Aware Adaptive Voltage [Auto]
CPU Core/Cache Voltage [Adaptive Mode]
- Offset Mode Sign [-]
- Additional Turbo Mode CPU Core Voltage [1.325]
- Offset Voltage [0.001]
DRAM Voltage [1.3500]
CPU VCCIO Voltage [1.12500]
CPU System Agent Voltage [1.15000]
PLL Termination Voltage [Auto]
PCH Core Voltage [Auto]
CPU Standby Voltage [Auto]
DRAM CTRL REF Voltage on CHA [Auto]
DRAM CTRL REF Voltage on CHB [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL0 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL1 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL2 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL3 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL4 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL5 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL6 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL7 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL0 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL1 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL2 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL3 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL4 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL5 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL6 [Auto]
DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL7 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL0 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL1 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL2 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL3 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL4 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL5 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL6 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL7 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL0 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL1 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL2 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL3 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL4 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL5 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL6 [Auto]
DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL7 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL0 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL1 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL2 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL3 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL4 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL5 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL6 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL7 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL0 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL1 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL2 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL3 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL4 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL5 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL6 [Auto]
DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL7 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL0 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL1 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL2 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL3 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL4 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL5 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL6 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL7 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL0 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL1 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL2 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL3 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL4 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL5 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL6 [Auto]
DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL7 [Auto]
Realtime Memory Timing [Disabled]
FCLK Frequency for Early Power On [Auto]
Initial BCLK Frequency [Auto]
BCLK Amplitude [Auto]
BCLK Slew Rate [Auto]
BCLK Spread Spectrum [Auto]
BCLK Frequency Slew Rate [Auto]
DRAM VTT Voltage [Auto]
VPPDDR Voltage [Auto]
DMI Voltage [Auto]
Core PLL Voltage [Auto]
Internal PLL Voltage [Auto]
GT PLL Voltage [Auto]
Ring PLL Voltage [Auto]
System Agent PLL Voltage [Auto]
Memory Controller PLL Voltage [Auto]
PLL Bandwidth [Auto]
Eventual DRAM Voltage [Auto]
Eventual CPU Standby Voltage [Auto]
Eventual PLL Termination Voltage [Auto]
Eventual DMI Voltage [Auto]
Maximus Tweak [Mode 1]
DRAM CAS# Latency [18]
DRAM RAS# to CAS# Delay [19]
DRAM RAS# ACT Time [39]
DRAM Command Rate [Auto]
DRAM RAS# to RAS# Delay L [Auto]
DRAM RAS# to RAS# Delay S [Auto]
DRAM REF Cycle Time [Auto]
DRAM Refresh Interval [Auto]
DRAM WRITE Recovery Time [Auto]
DRAM READ to PRE Time [Auto]
DRAM FOUR ACT WIN Time [Auto]
DRAM WRITE to READ Delay [Auto]
DRAM WRITE to READ Delay L [Auto]
DRAM WRITE to READ Delay S [Auto]
DRAM CKE Minimum Pulse Width [Auto]
DRAM Write Latency [Auto]
tRDRD_sg [Auto]
tRDRD_dg [Auto]
tRDWR_sg [Auto]
tRDWR_dg [Auto]
tWRWR_sg [Auto]
tWRWR_dg [Auto]
tWRRD_sg [Auto]
tWRRD_dg [Auto]
tRDRD_dr [Auto]
tRDRD_dd [Auto]
tRDWR_dr [Auto]
tRDWR_dd [Auto]
tWRWR_dr [Auto]
tWRWR_dd [Auto]
tWRRD_dr [Auto]
tWRRD_dd [Auto]
TWRPRE [Auto]
TRDPRE [Auto]
tREFIX9 [Auto]
OREF_RI [Auto]
MRC Fast Boot [Disabled]
DRAM CLK Period [Auto]
Memory Scrambler [Enabled]
Channel A DIMM Control [Enabled]
Channel B DIMM Control [Enabled]
MCH Full Check [Auto]
Training Profile [Auto]
DLLBwEn [Auto]
DRAM SPD Write [Disabled]
XTU Setting [Auto]
DRAM RTL INIT value [Auto]
DRAM RTL (CHA DIMM0 Rank0) [Auto]
DRAM RTL (CHA DIMM0 Rank1) [Auto]
DRAM RTL (CHA DIMM1 Rank0) [Auto]
DRAM RTL (CHA DIMM1 Rank1) [Auto]
DRAM RTL (CHB DIMM0 Rank0) [Auto]
DRAM RTL (CHB DIMM0 Rank1) [Auto]
DRAM RTL (CHB DIMM1 Rank0) [Auto]
DRAM RTL (CHB DIMM1 Rank1) [Auto]
DRAM IOL (CHA DIMM0 Rank0) [Auto]
DRAM IOL (CHA DIMM0 Rank1) [Auto]
DRAM IOL (CHA DIMM1 Rank0) [Auto]
DRAM IOL (CHA DIMM1 Rank1) [Auto]
DRAM IOL (CHB DIMM0 Rank0) [Auto]
DRAM IOL (CHB DIMM0 Rank1) [Auto]
DRAM IOL (CHB DIMM1 Rank0) [Auto]
DRAM IOL (CHB DIMM1 Rank1) [Auto]
CHA IO_Latency_offset [Auto]
CHB IO_Latency_offset [Auto]
CHA RFR delay [Auto]
CHB RFR delay [Auto]
ODT RTT WR (CHA) [Auto]
ODT RTT PARK (CHA) [Auto]
ODT RTT NOM (CHA) [Auto]
ODT RTT WR (CHB) [Auto]
ODT RTT PARK (CHB) [Auto]
ODT RTT NOM (CHB) [Auto]
ODT_READ_DURATION [Auto]
ODT_READ_DELAY [Auto]
ODT_WRITE_DURATION [Auto]
ODT_WRITE_DELAY [Auto]
Data Rising Slope [Auto]
Data Rising Slope Offset [Auto]
Cmd Rising Slope [Auto]
Cmd Rising Slope Offset [Auto]
Ctl Rising Slope [Auto]
Ctl Rising Slope Offset [Auto]
Clk Rising Slope [Auto]
Clk Rising Slope Offset [Auto]
Data Falling Slope [Auto]
Data Falling Slope Offset [Auto]
Cmd Falling Slope [Auto]
Cmd Falling Slope Offset [Auto]
Ctl Falling Slope [Auto]
Ctl Falling Slope Offset [Auto]
Clk Falling Slope [Auto]
Clk Falling Slope Offset [Auto]
CPU Load-line Calibration [Level 3]
CPU Current Capability [140%]
CPU VRM Switching Frequency [Auto]
VRM Spread Spectrum [Auto]
CPU Power Duty Control [T.Probe]
CPU Power Phase Control [Optimized]
CPU Power Thermal Control [120]
CPU VRM Thermal Control [Auto]
DRAM Current Capability [130%]
DRAM Switching Frequency [Auto]
CPU Core/Cache Boot Voltage [Auto]
DMI Boot Voltage [Auto]
Core PLL Boot Voltage [Auto]
CPU System Agent Boot Voltage [Auto]
CPU VCCIO Boot Voltage [Auto]
PLL Termination Boot voltage [Auto]
CPU Standby Boot Voltage [Auto]
Intel(R) SpeedStep(tm) [Enabled]
Turbo Mode [Enabled]
Long Duration Package Power Limit [4095]
Package Power Time Window [127]
Short Duration Package Power Limit [4095]
IA AC Load Line [0.01]
IA DC Load Line [0.01]
Hyper-Threading [Enabled]
Thermal Monitor [Enabled]
Active Processor Cores [All]
Intel Virtualization Technology [Disabled]
Hardware Prefetcher [Enabled]
Adjacent Cache Line Prefetch [Enabled]
Boot performance mode [Auto]
SW Guard Extensions (SGX) [Software Controlled]
Tcc Offset Time Window [Auto]
Execute Disable Bit [Enabled]
SMM Code Access Check [Enabled]
SMM Use Delay Indication [Enabled]
SMM Use Block Indication [Enabled]
Intel(R) SpeedStep(tm) [Enabled]
Turbo Mode [Enabled]
CPU C-states [Auto]
CFG Lock [Disabled]
Intel(R) Speed Shift Technology [Enabled]
Number of P states [0]
Acoustic Noise Mitigation [Disabled]
Disable Fast PKG C State Ramp for IA Domain [FALSE]
Slow Slew Rate for IA Domain [Fast/2]
Disable Fast PKG C State Ramp for GT Domain [FALSE]
Slow Slew Rate for GT Domain [Fast/2]
Disable Fast PKG C State Ramp for SA Domain [FALSE]
Slow Slew Rate for SA Domain [Fast/2]
Configurable TDP Boot Mode [Nominal]
Configurable TDP Lock [Disabled]
CTDP BIOS control [Disabled]
Power Limit 1 [0]
Power Limit 2 [0]
Power Limit 1 Time Window [0]
ConfigTDP Turbo Activation Ratio [0]
Overclocking Lock [Disabled]
PCI Express Native Power Management [Disabled]
PCH DMI ASPM [Disabled]
ASPM [Disabled]
DMI Link ASPM Control [Disabled]
PEG - ASPM [Disabled]
PTID Support [Enabled]
PECI Access Method [Direct I/O]
PCI Express Native Power Management [Disabled]
BDAT ACPI Table Support [Disabled]
Wake system from S5 [Disabled]
ACPI Debug [Disabled]
Low Power S0 Idle Capability [Disabled]
Lpit Recidency Counter [SLP S0]
PCI Delay Optimization [Disabled]
ZpODD Support [Disabled]
Type C Support [Enabled]
PEP CPU [Enabled]
PEP Graphics [Enabled]
PEP ISP [Disabled]
PEP SATA Controller [Enabled]
PEP RAID VOL0 [Disabled]
PEP SATA PORT0 [Disabled]
PEP SATA PORT1 [Disabled]
PEP SATA PORT2 [Disabled]
PEP SATA PORT3 [Disabled]
PEP SATA PORT4 [Disabled]
PEP SATA PORT5 [Disabled]
PEP SATA NVM1 [Disabled]
PEP SATA NVM2 [Disabled]
PEP SATA NVM3 [Disabled]
PEP UART [Enabled]
PEP I2C0 [Enabled]
PEP I2C1 [Enabled]
PEP I2C2 [Enabled]
PEP I2C3 [Enabled]
PEP I2C4 [Enabled]
PEP I2C5 [Enabled]
PEP SPI [Enabled]
PEP XHCI [Enabled]
PEP Audio [Enabled]
PEP EMMC [Enabled]
PEP SDXC [Enabled]
VT-d [Disabled]
Primary Display [Auto]
iGPU Multi-Monitor [Disabled]
DMI Max Link Speed [Auto]
PCIEX16/X8_1 Link Speed [Auto]
PCIEX8/X4_3 Link Speed [Auto]
PCIEX4_2 Link Speed [Auto]
PCIe Spread Spectrum Clocking [Auto]
IOAPIC 24-119 Entries [Enabled]
PCIe Speed [Auto]
SATA Controller(s) [Enabled]
SATA Mode Selection [AHCI]
S.M.A.R.T. Status Check [Enabled]
Aggressive LPM Support [Disabled]
SATA6G_1(Gray) [Enabled]
Hot Plug [Disabled]
SATA6G_2(Gray) [Enabled]
Hot Plug [Disabled]
SATA6G_3(Gray) [Enabled]
Hot Plug [Disabled]
SATA6G_4(Gray) [Enabled]
Hot Plug [Disabled]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 0 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 1 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 2 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 3 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 4 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 5 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
Port 6 [Enabled]
Hot Plug [Disabled]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 6 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
Port 7 [Enabled]
Hot Plug [Disabled]
Spin Up Device [Disabled]
SATA Device Type [Hard Disk Drive]
Topology [Unknown]
SATA Port 7 DevSlp [Disabled]
DITO Configuration [Disabled]
DITO Value [625]
DM Value [15]
PCI Express Root Port 1 [Enabled]
Topology [Unknown]
ASPM [Disabled]
L1 Substates [Disabled]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE1 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE1 LTR Lock [Disabled]
PCIE1 CLKREQ Mapping Override [Default]
PCI Express Root Port 2 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE2 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE2 LTR Lock [Disabled]
PCIE2 CLKREQ Mapping Override [Default]
PCI Express Root Port 3 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE3 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE3 LTR Lock [Disabled]
PCIE3 CLKREQ Mapping Override [Default]
PCI Express Root Port 4 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE4 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE4 LTR Lock [Disabled]
PCIE4 CLKREQ Mapping Override [Default]
PCI Express Root Port 5 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE5 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE5 LTR Lock [Disabled]
PCIE5 CLKREQ Mapping Override [Default]
PCI Express Root Port 6 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE6 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE6 LTR Lock [Disabled]
PCIE6 CLKREQ Mapping Override [Default]
PCI Express Root Port 7 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [7]
Reserved Memory [17]
Reserved I/O [16]
PCH PCIE7 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE7 LTR Lock [Disabled]
PCIE7 CLKREQ Mapping Override [Default]
PCI Express Root Port 8 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [7]
Reserved Memory [17]
Reserved I/O [8]
PCH PCIE8 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE8 LTR Lock [Disabled]
PCIE8 CLKREQ Mapping Override [Default]
PCI Express Root Port 9 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE9 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE9 LTR Lock [Disabled]
PCIE9 CLKREQ Mapping Override [Default]
PCI Express Root Port 10 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE10 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE10 LTR Lock [Disabled]
PCIE10 CLKREQ Mapping Override [Default]
PCI Express Root Port 11 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE11 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE11 LTR Lock [Disabled]
PCIE11 CLKREQ Mapping Override [Default]
PCI Express Root Port 12 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE12 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE12 LTR Lock [Disabled]
PCIE12 CLKREQ Mapping Override [Default]
PCI Express Root Port 13 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE13 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE13 LTR Lock [Disabled]
PCIE13 CLKREQ Mapping Override [Default]
PCI Express Root Port 14 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE14 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE14 LTR Lock [Disabled]
PCIE14 CLKREQ Mapping Override [Default]
PCI Express Root Port 15 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE15 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE15 LTR Lock [Disabled]
PCIE15 CLKREQ Mapping Override [Default]
PCI Express Root Port 16 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE16 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE16 LTR Lock [Disabled]
PCIE16 CLKREQ Mapping Override [Default]
PCI Express Root Port 17 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE17 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE17 LTR Lock [Disabled]
PCIE17 CLKREQ Mapping Override [Default]
PCI Express Root Port 18 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE18 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE18 LTR Lock [Disabled]
PCIE18 CLKREQ Mapping Override [Default]
PCI Express Root Port 19 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE19 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE19 LTR Lock [Disabled]
PCIE19 CLKREQ Mapping Override [Default]
PCI Express Root Port 20 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE20 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE20 LTR Lock [Disabled]
PCIE20 CLKREQ Mapping Override [Default]
PCI Express Root Port 21 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE21 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE21 LTR Lock [Disabled]
PCIE20 CLKREQ Mapping Override [Default]
PCI Express Root Port 22 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE22 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE22 LTR Lock [Disabled]
PCIE20 CLKREQ Mapping Override [Default]
PCI Express Root Port 23 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE23 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE23 LTR Lock [Disabled]
PCIE20 CLKREQ Mapping Override [Default]
PCI Express Root Port 24 [Enabled]
Topology [Unknown]
ASPM [Auto]
L1 Substates [L1.1 & L1.2]
Gen3 Eq Phase3 Method [Software Search]
UPTP [5]
DPTP [7]
ACS [Enabled]
URR [Disabled]
FER [Disabled]
NFER [Disabled]
CER [Disabled]
CTO [Disabled]
SEFE [Disabled]
SENFE [Disabled]
SECE [Disabled]
PME SCI [Enabled]
Hot Plug [Disabled]
Advanced Error Reporting [Enabled]
PCIe Speed [Auto]
Transmitter Half Swing [Disabled]
Detect Timeout [0]
Extra Bus Reserved [0]
Reserved Memory [10]
Reserved I/O [4]
PCH PCIE24 LTR [Enabled]
Snoop Latency Override [Auto]
Non Snoop Latency Override [Auto]
Force LTR Override [Disabled]
PCIE24 LTR Lock [Disabled]
PCIE20 CLKREQ Mapping Override [Default]
Audio DSP [Disabled]
HDA-Link Codec Select [Platform Onboard]
iDisplay Audio Disconnect [Disabled]
PME Enable [Disabled]
SerialIO timing parameters [Disabled]
TPM Device Selection [dTPM]
PTP aware OS [PTP Aware]
Me FW Image Re-Flash [Disabled]
Local FW Update [Enabled]
HECI Timeouts [Enabled]
Force ME DID Init Status [Disabled]
CPU Replaced Polling Disable [Disabled]
ME DID Message [Enabled]
HECI Retry Disable [Disabled]
HECI Message check Disable [Disabled]
MBP HOB Skip [Disabled]
HECI2 Interface Communication [Disabled]
KT Device [Enabled]
IDER Device [Enabled]
End Of Post Message [Send in DXE]
D0I3 Setting for HECI Disable [Disabled]
Select Camera [Ivcam]
Delay needed for Ivcam power on [0]
Delay needed for Ivcam power off [0]
Rotation [0]
DFU support [Disabled]
Wake support [Disabled]
Core PLL Voltage Offset [0]
GT PLL Voltage Offset [0]
Ring PLL Voltage Offset [0]
System Agent PLL Voltage Offset [0]
Memory Controller PLL Voltage Offset [0]
ASF support [Enabled]
USB Provisioning of AMT [Disabled]
Activate Remote Assistance Process [Disabled]
CIRA Timeout [0]
PET Progress [Enabled]
WatchDog [Disabled]
OS Timer [0]
BIOS Timer [0]
Secure Erase mode [Simulated]
Force Secure Erase [Disabled]
MEBx hotkey Pressed [Disabled]
MEBx Selection Screen [Disabled]
Hide Unconfigure ME Confirmation Prompt [Disabled]
MEBx OEM Debug Menu Enable [Disabled]
Unconfigure ME [Disabled]
Non-UI Mode Resolution [Auto]
UI Mode Resolution [Auto]
Graphics Mode Resolution [Auto]
Security Device Support [Enable]
Security Device Support [Enable]
Pending operation [None]
Platform Hierarchy [Enabled]
Storage Hierarchy [Enabled]
Endorsement Hierarchy [Enabled]
TPM2.0 UEFI Spec Version [TCG_2]
Physical Presence Spec Version [1.3]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Detect Non-Compliance Device [Disabled]
Prefetchable Memory [10]
Reserved Memory Alignment [1]
Prefetchable Memory Alignment [1]
Onboard LED [Enabled]
Q-Code LED Function [POST Code Only]
ErP Ready [Disabled]
Restore AC Power Loss [Power Off]
Power On By PCI-E/PCI [Disabled]
Power On By RTC [Disabled]
HD Audio Controller [Enabled]
M.2_2(DIMM.2) Configuration: [Auto][SATA mode][PCIE mode] [Auto]
Asmedia Back USB 3.1 Controller [Enabled]
USB Type C Power Switch [Auto]
When system is in working state [Off]
When system is in sleep, hibernate or soft off states [Off]
5G LAN Card [Enabled]
5G LAN PXE Option ROM [Disabled]
Intel LAN Controller [Enabled]
Intel LAN PXE Option ROM [Disabled]
Detect Non-Compliance Device [Disabled]
Primary PEG [Auto]
Primary PCIE [Auto]
Network Stack [Disabled]
Legacy USB Support [Enabled]
USB Keyboard and Mouse Simulator [Disabled]
U31G2_EC1 [Enabled]
U31G2_EA2 [Enabled]
U31G1_1 [Enabled]
U31G1_2 [Enabled]
U31G1_3 [Enabled]
U31G1_4 [Enabled]
U31G1_5 [Enabled]
U31G1_6 [Enabled]
U31G1_7 [Enabled]
U31G1_8 [Enabled]
USB_9 [Enabled]
USB_10 [Enabled]
USB_11 [Enabled]
USB_12 [Enabled]
USB_13 [Enabled]
USB_14 [Enabled]
CPU Temperature [Monitor]
MotherBoard Temperature [Monitor]
VRM Temperature [Monitor]
PCH Temperature [Monitor]
T_Sensor1 Temperature [Monitor]
T_Sensor2 Temperature [Monitor]
DIMM.2 Sensor 1 [Monitor]
DIMM.2 Sensor 2 [Monitor]
Water In T Sensor [Monitor]
Water Out T Sensor [Monitor]
CPU Fan Speed [Monitor]
Chassis Fan 1 Speed [Monitor]
Chassis Fan 2 Speed [Monitor]
Chassis Fan 3 Speed [Monitor]
AIO PUMP Speed [Monitor]
CPU Optional Fan Speed [Monitor]
W_PUMP+ Speed [Monitor]
Flow Rate [Monitor]
CPU Core Voltage [Monitor]
3.3V Voltage [Monitor]
5V Voltage [Monitor]
12V Voltage [Monitor]
CPU Q-Fan Control [Disabled]
AIO_PUMP/W_PUMP+ Control [Disabled]
Chassis Fan 1 Q-Fan Control [Disabled]
Chassis Fan 2 Q-Fan Control [Disabled]
Chassis Fan 3 Q-Fan Control [Disabled]
Fast Boot [Disabled]
Above 4G Decoding [Disabled]
Boot Logo Display [Auto]
POST Delay Time [3 sec]
Boot up NumLock State [Enabled]
Wait For 'F1' If Error [Enabled]
Option ROM Messages [Enabled]
Interrupt 19 Capture [Enabled]
Setup Mode [Advanced Mode]
Launch CSM [Enabled]
Boot Device Control [UEFI and Legacy OPROM]
Boot from Network Devices [Legacy only]
Boot from Storage Devices [Legacy only]
Boot from PCI-E/PCI Expansion Devices [Legacy only]
OS Type [Other OS]
Setup Animator [Disabled]
Load from Profile [1]
Profile Name [XMP]
Save to Profile [1]
CPU Core Voltage [Auto]
VCCSA Voltage [Auto]
BCLK Frequency [Auto]
CPU Ratio [Auto]
Cache Ratio [Auto]
Bus Interface [PCIEX16/X8_1]
